A cable television apparatus is applied to an input coaxial cable and an output coaxial cable to transmit a cable television signal. The cable television apparatus includes an improved choke, an input side, an output side, an input capacitor and an output capacitor. The improved choke is electrically connected to the input coaxial cable, the output coaxial cable, the input side, the output side, the input capacitor and the output capacitor. The improved choke includes a conductive wire and a ferrite core. One side of the conductive wire is electrically connected to the input side and one side of the input capacitor. The other side of the conductive wire is electrically connected to the output side and one side of the output capacitor. The ferrite core covers one part of the conductive wire. Moreover, the ferrite core is a high saturation current ferrite core.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

A power control circuit comprising a power supply and a load, the load being synthesized from an impedance synthesizer comprising two-terminal impedance elements connected in series and grouped in impedance modules. The impedance elements in each impedance module are of equal value, while those between the modules bear ratios uniquely defined according to the numbers of impedance elements in the impedance modules. A number of switches associated with said impedance elements short out a selected number of the impedance elements under the control of a first analog signal which may be preprocessed by an analytic function. The analog signal is converted to digital signals by an analog-to-digital converter, then level shifted to control the switches associated with the impedance elements, whereby the amount of power delivered to the load is controllable by the first analog signal. Pulse-width-modulation is deployed to further control the power by a second analog signal, with additional benefit of overload protection.

A variable capacitance circuit includes a capacitor array having a first capacitor in which a plurality of MIM capacitors are coupled in parallel and a second capacitor in which a plurality of MIM capacitors are coupled in series, and a switch array having a first switch and a second switch. A shape pattern of at least one of a first electrode of the first capacitor, a first ground shield, a second electrode of the second capacitor, and a second ground shield is set so that a first capacitance difference per 1 LSB between first capacitance values of the first capacitor when the first switch is turned on and off and a second capacitance difference per 1 LSB between second capacitance values of the second capacitor when the second switch is turned on and off are close to each other.

Embodiments relate to a circuit implementation for extending the bandwidth of an amplifier. The extended bandwidth amplifier includes an amplifier coupled between an input node and an output node of the extended bandwidth amplifier. The amplifier has an input capacitance and an output capacitance. The extended bandwidth amplifier additionally includes a first digitally-trimmable negative-capacitance capacitor coupled between the input node of the extended bandwidth amplifier and a power supply terminal. The digitally-trimmable negative-capacitance capacitor includes a first branch, a second branch, and a controller. The first branch includes a first capacitor having a first negative capacitance, and a first switch. The second branch includes a second capacitor having a second negative capacitance, and a second switch. The controller is configured to turn on the first switch and the second switch based on the input capacitance of the amplifier.

A variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and coupled to the port. The variable capacitor bank further includes capacitor modules disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor branch electrically coupled to the module input, the switched capacitor branch including a capacitor and a switch element in series with the capacitor. In certain implementations, one or more of the capacitor modules may include at least one second switched capacitor branch. The capacitor modules may further include an unswitched, or “floor”, capacitor that provides a minimum or otherwise known capacitance of the capacitor module. Each capacitor module may further be grounded by being electrically coupled to the conductive housing.

To achieve higher self-resonant frequency and lower parasitic resistance of a variable capacitance circuit whose capacitance value is changeable. The variable capacitance circuit includes a capacitor unit, a reactive element, and a bias circuit. The capacitor unit inside the variable capacitance circuit includes plural semiconductor elements connected in series, the plural semiconductor elements each having a capacitance value based on a bias voltage applied thereto. Further, the reactive element inside the variable capacitance circuit is connected to the capacitor unit. The bias circuit inside the variable capacitance circuit applies a bias voltage to each of the plural semiconductor elements.

Circuits and methods for electronically adjusting an effective inductance of one or more primary inductors in a circuit. The circuit may include a plurality of sub-circuits connected in parallel between an input and an output of the circuit. Each sub-circuit may include a primary inductor and an auxiliary inductor inductively coupled to the primary inductor. The circuit may further include first circuitry coupled to the primary inductor, wherein the first circuitry configured to introduce an oscillating first voltage across the primary inductor; and second circuitry coupled to the auxiliary inductor, wherein the second circuitry is configured to introduce an oscillating second voltage across the auxiliary inductor. The amplitudes of the second voltages may be selected to reduce a difference between effective inductances of the primary inductors.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.