The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

Provided are embodiments for a resistor array. The resistor array includes a plurality of resistor elements, where the plurality of resistor elements includes a redundancy region for a most significant bit of an expected value. The resistor array also includes one or more switches coupled to the plurality of resistor elements, and a first terminal and a second terminal coupled to the plurality of resistor elements. Also provided are embodiments for trimming the resistor array where the resistor array includes a redundancy region for a most significant bit for an expected value.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be field-programmable, i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

Circuits and methods for electronically adjusting an effective inductance of one or more primary inductors in a circuit. The circuit may include a plurality of sub-circuits connected in parallel between an input and an output of the circuit. Each sub-circuit may include a primary inductor and an auxiliary inductor inductively coupled to the primary inductor. The circuit may further include first circuitry coupled to the primary inductor, wherein the first circuitry configured to introduce an oscillating first voltage across the primary inductor; and second circuitry coupled to the auxiliary inductor, wherein the second circuitry is configured to introduce an oscillating second voltage across the auxiliary inductor. The amplitudes of the second voltages may be selected to reduce a difference between effective inductances of the primary inductors.

A cable television apparatus is applied to an input coaxial cable and an output coaxial cable to transmit a cable television signal. The cable television apparatus includes an improved choke, an input side, an output side, an input capacitor and an output capacitor. The improved choke is electrically connected to the input coaxial cable, the output coaxial cable, the input side, the output side, the input capacitor and the output capacitor. The improved choke includes a conductive wire and a ferrite core. One side of the conductive wire is electrically connected to the input side and one side of the input capacitor. The other side of the conductive wire is electrically connected to the output side and one side of the output capacitor. The ferrite core covers one part of the conductive wire. Moreover, the ferrite core is a high saturation current ferrite core.

Systems and implementations for inductance tuning systems that are configured to operate in a wide range of frequencies are provided herein, The subject matter described herein can in some embodiments include an inductance tuning system including at least one inductor connected to a first terminal, the at least one inductor comprising of a plurality of inductive elements that are substantially magnetically coupled to each other, wherein spacing between the inductive elements are substantially less than diameters of the windings, At least one capacitor can be connected between one or more of the plurality of inductive elements and a second terminal,

Systems and implementations for inductance tuning systems that are configured to operate in a wide range of frequencies are provided herein, The subject matter described herein can in some embodiments include an inductance tuning system including at least one inductor connected to a first terminal, the at least one inductor comprising of a plurality of inductive elements that are substantially magnetically coupled to each other, wherein spacing between the inductive elements are substantially less than diameters of the windings, At least one capacitor can be connected between one or more of the plurality of inductive elements and a second terminal,

Provided are embodiments for a resistor array. The resistor array includes a plurality of resistor elements, where the plurality of resistor elements includes a redundancy region for a most significant bit of an expected value. The resistor array also includes one or more switches coupled to the plurality of resistor elements, and a first terminal and a second terminal coupled to the plurality of resistor elements. Also provided are embodiments for trimming the resistor array where the resistor array includes a redundancy region for a most significant bit for an expected value.