A discrete capacitance switching circuit includes a DC decoupling capacitor connected between a power node that receives an AC signal and a first node, a diode connected between the first node and a second node, a unit capacitor connected between the second node and a reference node that receives a ground voltage, and a bias circuit. The bias circuit is configured to apply a first DC voltage to the first node and apply a second DC voltage to the second node. The applied first and second DC voltages control a switching operation of the diode.

Systems and implementations for inductance tuning systems that are configured to operate in a wide range of frequencies are provided herein. The subject matter described herein can in some embodiments include an inductance tuning system including at least one inductor connected to a first terminal, the at least one inductor comprising of a plurality of inductive elements that are substantially magnetically coupled to each other, wherein spacing between the inductive elements are substantially less than diameters of the windings. At least one capacitor can be connected between one or more of the plurality of inductive elements and a second terminal.

Systems and implementations for inductance tuning systems that are configured to operate in a wide range of frequencies are provided herein. The subject matter described herein can in some embodiments include an inductance tuning system including at least one inductor connected to a first terminal, the at least one inductor comprising of a plurality of inductive elements that are substantially magnetically coupled to each other, wherein spacing between the inductive elements are substantially less than diameters of the windings. At least one capacitor can be connected between one or more of the plurality of inductive elements and a second terminal.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

A power control circuit comprising a power supply and a load, the load being synthesized from an impedance synthesizer comprising two-terminal impedance elements connected in series and grouped in impedance modules. The impedance elements in each impedance module are of equal value, while those between the modules bear ratios uniquely defined according to the numbers of impedance elements in the impedance modules. A number of switches associated with said impedance elements short out a selected number of the impedance elements under the control of a first analog signal which may be preprocessed by an analytic function. The analog signal is converted to digital signals by an analog-to-digital converter, then level shifted to control the switches associated with the impedance elements, whereby the amount of power delivered to the load is controllable by the first analog signal. Pulse-width-modulation is deployed to further control the power by a second analog signal, with additional benefit of overload protection.

A variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and coupled to the port. The variable capacitor bank further includes capacitor modules disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor branch electrically coupled to the module input, the switched capacitor branch including a capacitor and a switch element in series with the capacitor. In certain implementations, one or more of the capacitor modules may include at least one second switched capacitor branch. The capacitor modules may further include an unswitched, or floor, capacitor that provides a minimum or otherwise known capacitance of the capacitor module. Each capacitor module may further be grounded by being electrically coupled to the conductive housing.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

A variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and coupled to the port. The variable capacitor bank further includes capacitor modules disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor branch electrically coupled to the module input, the switched capacitor branch including a capacitor and a switch element in series with the capacitor. In certain implementations, one or more of the capacitor modules may include at least one second switched capacitor branch. The capacitor modules may further include an unswitched, or floor, capacitor that provides a minimum or otherwise known capacitance of the capacitor module. Each capacitor module may further be grounded by being electrically coupled to the conductive housing.