Patent classifications
H03H7/24
RF signal aggregator and antenna system implementing the same
The disclosure concerns a signal aggregator component designed to couple with an antenna element to form an antenna system, wherein the resulting antenna system can achieve one-hundred percent or greater efficiency in receiving mode. In addition, the antenna system can achieve specific polarization and gain in different sectors of the antenna radiation pattern. The signal aggregator functions to dynamically enable or disable any number of its RF ports to select the RF input signal to aggregate.
CIRCUIT ARRANGEMENT
A circuit arrangement for an onboard network of a motor vehicle, includes a line having a first inductivity and connecting a component of a power electronics of an onboard network with an element, wherein the component is adapted for being clocked during operation of the power electronics at a clock frequency; and an absorber circuit assigned to the line and having a second inductivity and a capacitance, wherein the second inductivity of the absorber circuit is coupled with the first inductivity of the line.
Thin Film Resistance Element and High-Frequency Circuit
A thin-film resistive element includes: a first electrode that is formed with a conductor formed in an annular shape in a planar view; a second electrode that is formed with a conductor disposed at a distance from the first electrode in a region surrounded by the first electrode; and a thin-film resistor that is electrically connected to the first electrode and the second electrode.
Thin Film Resistance Element and High-Frequency Circuit
A thin-film resistive element includes: a first electrode that is formed with a conductor formed in an annular shape in a planar view; a second electrode that is formed with a conductor disposed at a distance from the first electrode in a region surrounded by the first electrode; and a thin-film resistor that is electrically connected to the first electrode and the second electrode.
ELECTRONIC CIRCUIT
[Object]
To suppress distortion of a three-dimensional resistor.
[Solving Means]
The electronic circuit includes a first resistor and a second resistor. The first resistor has a configuration of a resistor for a voltage between a first terminal and a second terminal thereof, and the first terminal is connected directly or indirectly to an input of the electronic circuit. The second resistor has a configuration of a resistor for a voltage between a first terminal and a second terminal thereof, and the first terminal is connected directly or indirectly to the second terminal of the first resistor. In the electronic circuit, the second terminal of the second resistor is connected directly or indirectly to a third terminal through which a resistance value of the first resistor is varied by a voltage.
ELECTRONIC CIRCUIT
[Object]
To suppress distortion of a three-dimensional resistor.
[Solving Means]
The electronic circuit includes a first resistor and a second resistor. The first resistor has a configuration of a resistor for a voltage between a first terminal and a second terminal thereof, and the first terminal is connected directly or indirectly to an input of the electronic circuit. The second resistor has a configuration of a resistor for a voltage between a first terminal and a second terminal thereof, and the first terminal is connected directly or indirectly to the second terminal of the first resistor. In the electronic circuit, the second terminal of the second resistor is connected directly or indirectly to a third terminal through which a resistance value of the first resistor is varied by a voltage.
Method and Apparatus to Optimize Power Clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Method and Apparatus to Optimize Power Clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Method and apparatus to optimize power clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Method and apparatus to optimize power clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.