Patent classifications
H03H15/02
Distributed photodiode with built-in equalization
A distributed photodiode with FIR filtering function enabled by a lumped transmission line is provided. The distributed photodiode includes inductors, a plurality of photodiode segments, photodiode biasing components, and termination impedance. The electrical bandwidth due to the junction parasitic capacitance of the photodiode is increased as the parasitic capacitance is absorbed in the transmission line structure. Moreover, the delay elements inherent in the transmission line enable implementation of an analog finite impulse response (FIR) filter that has equalization capability to allow a customized photodiode frequency response compensation.
Finite impulse response analog receive filter with amplifier-based delay chain
High-data rate channel interface modules and equalization methods employing a finite impulse response (FIR) analog receive filter. Embodiments include an illustrative channel interface module having multiple amplifier-based delay units arranged in a sequential chain to convert an analog input signal into a set of increasingly-delayed analog signals that are weighted and combined together with the analog input signal to form an equalized signal; and a symbol decision element operating on the equalized signal to obtain a sequence of symbol decisions. An interface that extracts received data from the sequence of symbol decisions. The delay units may employ one or more delay cells each having a common-source amplifier stage followed by a source follower output stage, the two stages providing approximately equal portions of the propagation delay. An enhanced gate-to-drain capacitance in the common-source amplifier may increase propagation delay while reducing bandwidth limitations.
FINITE IMPULSE RESPONSE ANALOG RECEIVE FILTER WITH AMPLIFIER-BASED DELAY CHAIN
High-data rate channel interface modules and equalization methods employing a finite impulse response (FIR) analog receive filter. Embodiments include an illustrative channel interface module having multiple amplifier-based delay units arranged in a sequential chain to convert an analog input signal into a set of increasingly-delayed analog signals that are weighted and combined together with the analog input signal to form an equalized signal; and a symbol decision element operating on the equalized signal to obtain a sequence of symbol decisions. An interface that extracts received data from the sequence of symbol decisions. The delay units may employ one or more delay cells each having a common-source amplifier stage followed by a source follower output stage, the two stages providing approximately equal portions of the propagation delay. An enhanced gate-to-drain capacitance in the common-source amplifier may increase propagation delay while reducing bandwidth limitations.
Multi-path analog system with multi-mode high-pass filter
A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
Multi-path analog system with multi-mode high-pass filter
A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
Charge sharing filter
A charge sharing filter includes a rotating capacitor, and a plurality of elementary filters, each elementary filter comprising: an elementary switch coupled between a first node of the respective elementary filter and a second node of the respective elementary filter; and a history capacitor coupled to the first node of the respective elementary filter, wherein the second nodes of the plurality of elementary filters are interconnected with the rotating capacitor in one interconnecting node.
8GHz-20GHz noise cancelling transversal reconfigurable notch filter
A tunable analog noise-cancelling transversal reconfigurable filter for filtering an RF signal. The filter includes a noise-cancelling balun responsive to the RF signal and providing gain and noise suppression, and a time delay network responsive to the signal from the balun. The time delay network includes a single continuous three-dimensional air coaxial line where a separate tap is provided between sections of the line. The filter also includes a multiplication and summing network having a plurality of multiplication stages, where each stage is fed by a voltage signal from at least one of the taps, and each stage includes a multiplication amplifier that amplifies the voltage signal. A tuning element provides a multiplication coefficient to the amplified signal. Each amplified signal in each stage is added on an output line, where the multiplication and summing network operates under Millman's Theorem.
DISTRIBUTED PHOTODIODE WITH BUILT-IN EQUALIZATION
A distributed photodiode with FIR filtering function enabled by a lumped transmission line is provided. The distributed photodiode includes inductors, a plurality of photodiode segments, photodiode biasing components, and termination impedance. The electrical bandwidth due to the junction parasitic capacitance of the photodiode is increased as the parasitic capacitance is absorbed in the transmission line structure. Moreover, the delay elements inherent in the transmission line enable implementation of an analog finite impulse response (FIR) filter that has equalization capability to allow a customized photodiode frequency response compensation.
DISTRIBUTED PHOTODIODE WITH BUILT-IN EQUALIZATION
A distributed photodiode with FIR filtering function enabled by a lumped transmission line is provided. The distributed photodiode includes inductors, a plurality of photodiode segments, photodiode biasing components, and termination impedance. The electrical bandwidth due to the junction parasitic capacitance of the photodiode is increased as the parasitic capacitance is absorbed in the transmission line structure. Moreover, the delay elements inherent in the transmission line enable implementation of an analog finite impulse response (FIR) filter that has equalization capability to allow a customized photodiode frequency response compensation.
Finite impulse response filter for producing outputs having different phases
A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.