Digital signal processing (“DSP”) block circuitry on an integrated circuit (“IC”) is adapted for use, e.g., in multiple instances of the DSP block circuitry on the IC, for implementing finite-impulse-response (“FIR”) filters that are dynamically adjustable. Advantages of such DSP block circuitries may include an increase in performance and a reduction in logic and memory usage for multi-standard FIR filters.

A discrete-time (e.g., digital) filter can be used as an interpolation filter for processing an oversampled input signal, such as included as a portion of a sigma-delta digital-to-analog conversion circuit. An interpolation filter control circuit can be configured to adjust a filter order of the discrete-time interpolation filter at least in part in response to information indicative of an envelope signal magnitude. For example, higher-level input signals might be processed using an interpolation filter having a stop-band attenuation that is more stringently-specified (e.g., having greater attenuation) than a corresponding attenuation used for lower-level input signals. The filter order can be variable, such as varied in response to a detected envelope magnitude of the input signal to achieve power savings as compared to a filter having fixed parameters.

A storage apparatus of an associative array type that stores a large-sized value at a low cost is provided. The storage apparatus of the associative array type includes a first memory, a second memory that stores a value, and a third memory. The first memory stores a key and an address of the second memory. The address of the second memory is an address where the value corresponding to the key is stored. The third memory stores an address of the first memory. The address of the first memory is an address where the key corresponding to the value stored in the second memory is stored. The first memory further stores a flag that indicates whether or not the key has been registered.

A method for recovering a sparse signal of a finite field may include: updating discrete probability information of a target signal element of the finite field and discrete probability information of a measurement signal element of the finite field by exchanging the discrete probability information of the target signal element with the discrete probability information of the measurement signal element a predetermined number of times, wherein the target signal element and the measurement signal element are related to each other; calculating a final posteriori probability based on a priori probability of the target signal element and the discrete probability information of the measurement signal element, acquired as the exchange result; and recovering the target signal by performing maximum posteriori estimation to maximize the final posteriori probability.

A system and method for representing quasi-periodic waveforms, for example, representing a plurality of limited decompositions of the quasi-periodic waveform. Each decomposition includes a first and second amplitude value and at least one time value. In some embodiments, each of the decompositions is phase adjusted such that the arithmetic sum of the plurality of limited decompositions reconstructs the quasi-periodic waveform. Data-structure attributes are created and used to reconstruct the quasi-periodic waveform. Features of the quasi-periodic wave are tracked using pattern-recognition techniques. The fundamental rate of the signal (e.g., heartbeat) can vary widely, for example by a factor of 2-3 or more from the lowest to highest frequency. To get quarter-phase representations of a component (e.g., lowest frequency “rate” component) that varies over time (by a factor of two to three) many overlapping filters use bandpass and overlap parameters that allow tracking the component's frequency version on changing quarter-phase basis.

A signal acquisition circuit for acquiring data of an input signal comprising at least n acquisition units, wherein n is integer greater than one, the n acquisition units comprising k inputs, wherein k is integer greater than one, and wherein at least two inputs are assigned to one channel and the corresponding acquisition units run time interleaved, and at least one trigger unit, wherein the number 1 of the at least one trigger unit is integer and wherein 1 is smaller than k. Further, a single-housed device as well as a method of acquiring data of an input signal are described.

The physical and/or mental condition of a vehicle occupant can be recognized on the basis of a BCG (ballistocardiograph) signal, which is obtained by means of a BCG sensor. The BCG sensor is an MEM sensor; a cross-correlation of the BCG signal with heartbeat parameters is carried out in an optimum filter, which heartbeat parameters are varied within predefined limits to find a maximum of the cross-correlation function; and probable peaks are located in a cross-correlation function found in this manner and the heart rate is calculated therefrom.

The physical and/or mental condition of a vehicle occupant can be recognized on the basis of a BCG (ballistocardiograph) signal, which is obtained by means of a BCG sensor. The BCG sensor is an MEM sensor; a cross-correlation of the BCG signal with heartbeat parameters is carried out in an optimum filter, which heartbeat parameters are varied within predefined limits to find a maximum of the cross-correlation function; and probable peaks are located in a cross-correlation function found in this manner and the heart rate is calculated therefrom.

An analysis filter bank corresponding to multiple sub-bands, which performs frequency-division filtering on an input signal to generate multiple sub-band signals, the analysis filter bank comprising: a sub-band response pre-compensator which performs a linear filtering on the input signal to generate a response pre-compensated signal, multiple sub-filters with different central frequencies, which perform complex-type first-order infinite impulse response filtering respectively on the response pre-compensated signal to generate multiple sub-filter signals, and multiple binomially-combining and rotating devices based on a set of binomial weights, each of which performs a weighted summation on at least two of the sub-filter signals with the set of binomial weights, and rotates a weighted-summation result with a rotating phase according to a corresponding sub-band central frequency to generate one of the sub-band signals, wherein the at least two of the sub-filter signals are generated by at least two of the sub-filters adjacent in central frequency.

A digital filter includes: integration calculation units (10) that are cascade-connected, are fed time-division-multiplexed data, the time-division-multiplexed data being formed of pieces of data on M channels that are time-division multiplexed, the pieces of data on the respective channels being updated at a rate equal to a sampling frequency f.sub.s, operate in accordance with a clock having a frequency f.sub.s×M, and integrate the time-division-multiplexed data for every M samples; a frequency conversion unit (11) that operates in accordance with a clock having a frequency f.sub.D×M, decimates data at the sampling frequency f.sub.s input from the integration calculation unit (10) in the last stage at a sampling frequency f.sub.D, and delays data obtained as a result of decimation by (M−1) samples; and difference calculation units (12) that operate in accordance with the clock having the frequency f.sub.D×M, are cascade-connected to the output of the frequency conversion unit (11), and each subtract, from data input thereto, data M samples before.