H03K3/01

Sub-pulsing during a state

A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.

Sub-pulsing during a state

A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.

Apparatus for high voltage tolerant driver

Described is an apparatus which comprises: a first power supply; a second power supply lower than the first power supply; first and second transistors coupled in series and to be biased, the first and second transistors coupled to a pad; a first pull-up transistor coupled to the first power supply and to one of the first or second transistors; a pull-down transistor coupled to one of the first or second transistors; and a second pull-up transistor coupled to the second power supply, the pull-down transistor, and to one of the first or second transistors.

SPREAD SPECTRUM CLOCK GENERATOR CIRCUIT
20170264303 · 2017-09-14 · ·

A spread spectrum clock generator circuit includes a phase comparator; an oscillator to output an output clock signal; a phase selector to select one of phases equally dividing one cycle of the output clock signal, and to generate a phase shift clock signal having a rising edge in the selected phase; and a phase shift controller to control the phase selector. The phase shift controller generates a variable phase shift amount; determines the phase of the rising edge so that the cycle of the phase shift clock signal has a length changed from the cycle of the output clock signal by the variable phase shift amount added with a fixed phase shift amount; and changes a setting of an SS modulation profile if the selected phase exceeds an upper limit, falls below a lower limit, or is within the upper and lower limits.

SPREAD SPECTRUM CLOCK GENERATOR CIRCUIT
20170264303 · 2017-09-14 · ·

A spread spectrum clock generator circuit includes a phase comparator; an oscillator to output an output clock signal; a phase selector to select one of phases equally dividing one cycle of the output clock signal, and to generate a phase shift clock signal having a rising edge in the selected phase; and a phase shift controller to control the phase selector. The phase shift controller generates a variable phase shift amount; determines the phase of the rising edge so that the cycle of the phase shift clock signal has a length changed from the cycle of the output clock signal by the variable phase shift amount added with a fixed phase shift amount; and changes a setting of an SS modulation profile if the selected phase exceeds an upper limit, falls below a lower limit, or is within the upper and lower limits.

HIGH-VOLTAGE PULSE GENERATOR AND COMMUNICATION METHOD THEREFOR
20220045716 · 2022-02-10 ·

Disclosed are a high-voltage pulse generator and a communication method therefor. The high-voltage pulse generator comprises a master controller and a sub-controller. Data transmitted between the master controller and the sub-controller at least comprise a first class of data and a second class of data, and, the second class of data at least comprise two types. The communication method comprises the following steps: during the present instance of transmitting a first class of data, transmitting partial types of a second class of data; during the next instance of transmitting the first class of data, transmitting other types of second class of data; and repeatedly executing the step until the transmission of all types of second class of data is completed. The present application ensures an increased real time performance in the transmission of the first class of data; moreover, controller pin resources occupied are reduced, costs are reduced, and the problem of data conflict is avoided.

HIGH-VOLTAGE PULSE GENERATOR AND COMMUNICATION METHOD THEREFOR
20220045716 · 2022-02-10 ·

Disclosed are a high-voltage pulse generator and a communication method therefor. The high-voltage pulse generator comprises a master controller and a sub-controller. Data transmitted between the master controller and the sub-controller at least comprise a first class of data and a second class of data, and, the second class of data at least comprise two types. The communication method comprises the following steps: during the present instance of transmitting a first class of data, transmitting partial types of a second class of data; during the next instance of transmitting the first class of data, transmitting other types of second class of data; and repeatedly executing the step until the transmission of all types of second class of data is completed. The present application ensures an increased real time performance in the transmission of the first class of data; moreover, controller pin resources occupied are reduced, costs are reduced, and the problem of data conflict is avoided.

SWITCH DEVICE AND SWITCH SYSTEM
20220230822 · 2022-07-21 ·

A switch device includes: a voltage dividing circuit that outputs a voltage dividing value corresponding to a conduction state of each of a first switch and a second switch to an output line; an operation interface including a dial which rotates in accordance with a user operation; a rotation detection circuit that detects (i) rotation of the dial by a predetermined angle and (ii) a rotation direction of the dial, and generates an angle signal which includes a pulse indicating detection of the rotation by the predetermined angle, and a direction signal which indicates whether the rotation direction is a first direction or a second direction; and a selection circuit that selects whether to output the pulse of the angle signal to control the first switch or to output the pulse to control the second switch, according to whether the direction signal indicates the first or the second direction.

SWITCH DEVICE AND SWITCH SYSTEM
20220230822 · 2022-07-21 ·

A switch device includes: a voltage dividing circuit that outputs a voltage dividing value corresponding to a conduction state of each of a first switch and a second switch to an output line; an operation interface including a dial which rotates in accordance with a user operation; a rotation detection circuit that detects (i) rotation of the dial by a predetermined angle and (ii) a rotation direction of the dial, and generates an angle signal which includes a pulse indicating detection of the rotation by the predetermined angle, and a direction signal which indicates whether the rotation direction is a first direction or a second direction; and a selection circuit that selects whether to output the pulse of the angle signal to control the first switch or to output the pulse to control the second switch, according to whether the direction signal indicates the first or the second direction.

Dual bootstrapping for an open-loop pulse width modulation driver

A driver system may include a first n-type field-effect transistor coupled at its non-gate terminals between an output of the driver system and a first terminal of a supply voltage and configured to drive the output when the first n-type field-effect transistor is activated, a second n-type field-effect transistor coupled at its non-gate terminals between an output of the driver system and a second terminal of the supply voltage and configured to drive the output when the second n-type field-effect transistor is activated, a high-side capacitor coupled to the output of the driver system, and a low-side capacitor coupled to the second terminal of the supply voltage, wherein the high-side capacitor and the low-side capacitor are configured to track and correct for mismatches between a first resistance of the first n-type field-effect transistor and a second resistance of the second n-type field-effect transistor.