Some of the disclosed methods and apparatuses use several types of stochastic binary string (SBS) generators to generate SBS sequences based on the particular values to be multiplied. Some embodiments use a multiphase SBS generator to more efficiently generate multiple SBS sequences that are offset from one another in “phase”,

Some of the disclosed methods and apparatuses use several types of stochastic binary string (SBS) generators to generate SBS sequences based on the particular values to be multiplied. Some embodiments use a multiphase SBS generator to more efficiently generate multiple SBS sequences that are offset from one another in “phase”,

A random pulse generator includes: a randomness test circuit suitable for testing randomness of a random pulse; a control circuit suitable for generating frequency control information and puke control information based on a test result of the randomness test circuit; a periodic wave generating circuit suitable for generating a periodic wave whose frequency is changed based on the frequency control information; and a pulse generating circuit suitable for generating the random pulse based on the periodic wave and the pulse control information.

A random pulse generator includes: a randomness test circuit suitable for testing randomness of a random pulse; a control circuit suitable for generating frequency control information and puke control information based on a test result of the randomness test circuit; a periodic wave generating circuit suitable for generating a periodic wave whose frequency is changed based on the frequency control information; and a pulse generating circuit suitable for generating the random pulse based on the periodic wave and the pulse control information.

A logic circuit includes a data signal input, a computational module, a direct timing modulator and an amplitude and non-direct timing modulator. The data signal input inputs data signals. The computational module includes multiple logic elements interconnected to perform a logic function. The direct timing modulator modulates a propagation time of the input data signals from the data signal input to the computational unit, in accordance with a first set of control signals. The amplitude and non-direct timing modulator modulates the processing time of data signals by the computational module and the amplitude of data signals propagating through the computational module, in accordance with a second set of control signals.

A true random number generator device based on a diffusive memristor is disclosed. The random number generator device includes a diffusive memristor driven by a pulse generator circuit. The diffusive memristor produces a stochastically switched output signal. A comparator circuit receives the stochastically switched output signal from the diffusive memristor and generates an output signal having a random pulse width. An AND gate logic circuit is driven by a clock signal and the output signal from the comparator circuit. The AND gate logic circuit produces a combined output signal. A counter circuit receives the combined output signal from the AND gate logic circuit and generates a random bit string output signal.

A true random number generator device based on a diffusive memristor is disclosed. The random number generator device includes a diffusive memristor driven by a pulse generator circuit. The diffusive memristor produces a stochastically switched output signal. A comparator circuit receives the stochastically switched output signal from the diffusive memristor and generates an output signal having a random pulse width. An AND gate logic circuit is driven by a clock signal and the output signal from the comparator circuit. The AND gate logic circuit produces a combined output signal. A counter circuit receives the combined output signal from the AND gate logic circuit and generates a random bit string output signal.

A digital calibration method, a device, and a true random number generator circuit are provided. In one aspect, the embodiment of the present disclosure uses the digital calibration method to calibrate compensation of a circuit to be calibrated, output of the circuit to be calibrated is sampled and tested multiple times, and whether a current test compensation calibration code value can make the circuit to be calibrated meet specified accuracy is judged based on a probability that the output result is a target result. Through sampling the output of the circuit to be calibrated multiple times, the selected compensation calibration code has higher accuracy.

A digital calibration method, a device, and a true random number generator circuit are provided. In one aspect, the embodiment of the present disclosure uses the digital calibration method to calibrate compensation of a circuit to be calibrated, output of the circuit to be calibrated is sampled and tested multiple times, and whether a current test compensation calibration code value can make the circuit to be calibrated meet specified accuracy is judged based on a probability that the output result is a target result. Through sampling the output of the circuit to be calibrated multiple times, the selected compensation calibration code has higher accuracy.

A pseudo-random number generation circuit device includes a pseudo-random number generation circuit including a logic circuit configured based on rule data that generates a next random number value from a current random number value, a cycle detection circuit that detects, based on a seed, an end of a cycle of random numbers, which are generated by the pseudo-random number generation circuit, and a rule data generation circuit that generates new rule data at a first trigger, at which the cycle detection circuit detects the end of the cycle of random numbers, to output the new rule data to the pseudo-random number generation circuit, wherein the cycle detection circuit stores a random number value, which is generated by a new logic circuit configured based on the new rule data, as the seed.