Patent classifications
H03K4/02
Ramp signal generation device and CMOS image sensor including the same
A ramp signal generation device includes a sampling circuit suitable for sampling a ramp current, which flows on a plurality of ramp current paths, and storing a voltage corresponding to the sampled ramp current; a current maintaining circuit suitable for maintaining the ramp current; a current maintaining/transferring circuit suitable for maintaining and transferring a current corresponding to the voltage stored by the sampling circuit; a selection circuit suitable for selecting a ramp current path of the sampling block and the current maintaining/transferring circuit; and a current-to-voltage converter suitable for converting the current transferred from the current maintaining/transferring circuit and generating therefrom a ramp voltage.
Ramp signal generation device and CMOS image sensor including the same
A ramp signal generation device includes a sampling circuit suitable for sampling a ramp current, which flows on a plurality of ramp current paths, and storing a voltage corresponding to the sampled ramp current; a current maintaining circuit suitable for maintaining the ramp current; a current maintaining/transferring circuit suitable for maintaining and transferring a current corresponding to the voltage stored by the sampling circuit; a selection circuit suitable for selecting a ramp current path of the sampling block and the current maintaining/transferring circuit; and a current-to-voltage converter suitable for converting the current transferred from the current maintaining/transferring circuit and generating therefrom a ramp voltage.
GATE SELECT SIGNAL WITH REDUCED INTERFERENCE
A processing system for a display device comprises a display driver configured to generate a gate select signal and output the gate select signal to gate select control circuitry to be driven on gate lines for display updating. The gate select signal comprises a transition from a first voltage to a second voltage, a transition from the second voltage to a third voltage, and a transition from the third voltage to the first voltage. The second voltage is greater than the first voltage and the second voltage is maintained for a first period. The third voltage is greater than the second voltage and the third voltage is maintained for a second period. The gate select signal is driven by the gate select control circuitry on gate lines of the display device to select one or more subpixels of the display device for display updating.
Gate select signal with reduced interference
A processing system for a display device comprises a display driver configured to generate a gate select signal and output the gate select signal to gate select control circuitry to be driven on gate lines for display updating. The gate select signal comprises a transition from a first voltage to a second voltage, a transition from the second voltage to a third voltage, and a transition from the third voltage to the first voltage. The second voltage is greater than the first voltage and the second voltage is maintained for a first period. The third voltage is greater than the second voltage and the third voltage is maintained for a second period. The gate select signal is driven by the gate select control circuitry on gate lines of the display device to select one or more subpixels of the display device for display updating.
METHOD OF DRIVING A CAPACITIVE LOAD, CORRESPONDING CIRCUIT AND DEVICE
In an embodiment, a method includes pre-charging a parasitic capacitance of a control node that is coupled to a control terminal of first and second transistors that have respective current paths that form a switched current path coupled between a load node and a storage node. Pre-charging the parasitic capacitance includes: making conductive a first auxiliary transistor that has a current path coupled between the storage node and the control node, or making conductive a second auxiliary transistor that has a current path coupled between the load node and the control node. The method further includes, after pre-charging the parasitic capacitance, making the switched current path conductive to couple the load node to the storage node.
Square Wave Generating Method and Square Wave Generating Circuit
The present application provides a square wave generating method, applied in a square wave generating circuit, configured to generate a mimetic square wave signal, wherein the square wave generating circuit has a breakdown voltage. The square wave generating method comprises the square wave generating circuit generating the mimetic square wave signal as a first voltage during a first time interval; the square wave generating circuit generating the mimetic square wave signal as a second voltage during a second time interval; and the square wave generating circuit generating the mimetic square wave signal as a transient voltage during a transient interval between the first time interval and the second time interval, wherein the transient voltage is between the first voltage and the second voltage; wherein a first voltage difference between the first voltage and the second voltage is greater than the breakdown voltage.
Square Wave Generating Method and Square Wave Generating Circuit
The present application provides a square wave generating method, applied in a square wave generating circuit, configured to generate a mimetic square wave signal, wherein the square wave generating circuit has a breakdown voltage. The square wave generating method comprises the square wave generating circuit generating the mimetic square wave signal as a first voltage during a first time interval; the square wave generating circuit generating the mimetic square wave signal as a second voltage during a second time interval; and the square wave generating circuit generating the mimetic square wave signal as a transient voltage during a transient interval between the first time interval and the second time interval, wherein the transient voltage is between the first voltage and the second voltage; wherein a first voltage difference between the first voltage and the second voltage is greater than the breakdown voltage.
Method, circuit, and apparatus to increase robustness to inrush current in power switch devices
In accordance with an embodiment, a method includes receiving an enable signal. After the enable signal is asserted, it is determined whether a soft-start capacitor is electrically connected to an input of a ramp generator circuit while keeping an output of the ramp generator circuit low. If the soft-start capacitor is electrically connected to the input of the ramp generator circuit, a first current is injected into the input of the ramp generator circuit to generate a first voltage ramp at the output of the ramp generator circuit. If the soft-start capacitor is not electrically connected to the input of the ramp generator circuit, a second current is injected to the input of the ramp generator circuit to generate a second voltage ramp at the output of the ramp generator circuit. The second current is smaller than the first current.
METHOD, CIRCUIT, AND APPARATUS TO INCREASE ROBUSTNESS TO INRUSH CURRENT IN POWER SWITCH DEVICES
In accordance with an embodiment, a method includes receiving an enable signal. After the enable signal is asserted, it is determined whether a soft-start capacitor is electrically connected to an input of a ramp generator circuit while keeping an output of the ramp generator circuit low. If the soft-start capacitor is electrically connected to the input of the ramp generator circuit, a first current is injected into the input of the ramp generator circuit to generate a first voltage ramp at the output of the ramp generator circuit. If the soft-start capacitor is not electrically connected to the input of the ramp generator circuit, a second current is injected to the input of the ramp generator circuit to generate a second voltage ramp at the output of the ramp generator circuit. The second current is smaller than the first current.
Square wave generating method and square wave generating circuit
The present application provides a square wave generating method, applied in a square wave generating circuit, configured to generate a mimetic square wave signal, wherein the square wave generating circuit has a breakdown voltage. The square wave generating method comprises the square wave generating circuit generating the mimetic square wave signal as a first voltage during a first time interval; the square wave generating circuit generating the mimetic square wave signal as a second voltage during a second time interval; and the square wave generating circuit generating the mimetic square wave signal as a transient voltage during a transient interval between the first time interval and the second time interval, wherein the transient voltage is between the first voltage and the second voltage; wherein a first voltage difference between the first voltage and the second voltage is greater than the breakdown voltage.