A drive circuit includes a control signal generator configured to generate a control signal based on a drive signal and a source drive signal, and an amplifier including a high-side transistor and a low-side transistor controlled based on the control signal. The amplifier is configured to output the drive signal from an output terminal to drive a capacitive load during a first period in which a voltage of the drive signal changes to be higher than or equal to a first voltage per unit time and a second period in which the voltage changes to be lower than the first voltage or does not change per unit time. The first period includes a period in which one of the high-side and the low-side transistors performs a switching operation. The second period includes a period in which the one of the high-side and the low-side transistors performs a linear operation.

A thermal-type flow meter for representing a flow rate of air by the frequency of a periodic signal, wherein abnormalities in the waveform of an output signal due to frequency variation is prevented while high-frequency noise is suppressed. The thermal-type flow meter pertaining to the present invention is provided with a plurality of switching elements connected in parallel, and varies a delay width between the switching elements in accordance with variation of the frequency of a periodic signal for representing a flow rate.

Digital-to-analog converter (master DAC) circuitry is disclosed that is programmable to set a controlled slew rate for pulses that are otherwise defined as having sharp amplitude transitions. For example, when producing a biphasic pulse, the constant amplitude and duration of first and second pulses phases can be defined and provided to the DAC in traditional fashion. Slew rate control signals control a slew rate DAC within the master DAC, which prescribes a slew rate that will appear at sharp transitions of the defined biphasic pulses, i.e., at the beginning of the first phase, at the transition from the first to the second phase, and at the end of the second phase. The slew rate can vary with the duration or frequency of the pulses, with lower slew rates used with longer durations and/or lower frequencies, and with higher slew rates used with shorter durations and/or higher frequencies.

A drive circuit which drives a capacitive load on the basis of a drive signal output from a node includes a first wire; a second wire; an amplification unit; a capacitor and a resistance element; a determination unit which determines whether or not a voltage of a differentiated drive signal is within a predetermined range in case where a magnitude of a voltage change of the signal is less than or equal to a threshold; and a voltage output unit which amplifies the a voltage of the signal by a predetermined multiple, for example, one time, and outputs the amplified signal toward the node in a case where it is determined that the voltage of the differentiated drive signal is within the predetermined range.

A drive circuit which drives a capacitive load on the basis of a drive signal output from a node includes a first wire; a second wire; an amplification unit; a capacitor and a resistance element; a determination unit which determines whether or not a voltage of a differentiated drive signal is within a predetermined range in case where a magnitude of a voltage change of the signal is less than or equal to a threshold; and a voltage output unit which amplifies the a voltage of the signal by a predetermined multiple, for example, one time, and outputs the amplified signal toward the node in a case where it is determined that the voltage of the differentiated drive signal is within the predetermined range.

A receiving assemblage is provided for a control device in a vehicle, having a voltage generator for generating a synchronization pulse, which encompasses a first voltage source, a current source, and a current sink, the voltage generator generating the synchronization pulse within predefined specification limits with a predefined shape and a predefined time-related behavior, and the receiving assemblage outputting the synchronization pulse via a data bus to at least one sensor for synchronization of a subsequent signal transfer, the voltage generator generating the synchronization pulse via the current source and the current sink, substantially as a sinusoidal oscillation, by charging and/or discharging a bus load, and to a method for generating a synchronization pulse.

A receiving assemblage is provided for a control device in a vehicle, having a voltage generator for generating a synchronization pulse, which encompasses a first voltage source, a current source, and a current sink, the voltage generator generating the synchronization pulse within predefined specification limits with a predefined shape and a predefined time-related behavior, and the receiving assemblage outputting the synchronization pulse via a data bus to at least one sensor for synchronization of a subsequent signal transfer, the voltage generator generating the synchronization pulse via the current source and the current sink, substantially as a sinusoidal oscillation, by charging and/or discharging a bus load, and to a method for generating a synchronization pulse.

Methods and devices are disclosed driving one or more P-Intrinsic-N (PIN) diodes by receiving an input and generating a plurality of pulses based on the input, a first pulse of the plurality of pulses controls a rise time of an RF envelope generated by an RF interface and a second pulse of the plurality of pulses controls a fall time of the RF envelope generated by the RF interface. The methods and devices may further be disclosed combining the plurality of pulses to generate a drive signal, delivering the drive signal to the RF interface including one or more PIN diodes, and generating the RF envelope by driving the one or more PIN diodes with the drive signal, and the amplitude or a pulse width of the first pulse is independently adjustable from the amplitude or the pulse width of the second pulse.

Methods and devices are disclosed driving one or more P-Intrinsic-N (PIN) diodes by receiving an input and generating a plurality of pulses based on the input, a first pulse of the plurality of pulses controls a rise time of an RF envelope generated by an RF interface and a second pulse of the plurality of pulses controls a fall time of the RF envelope generated by the RF interface. The methods and devices may further be disclosed combining the plurality of pulses to generate a drive signal, delivering the drive signal to the RF interface including one or more PIN diodes, and generating the RF envelope by driving the one or more PIN diodes with the drive signal, and the amplitude or a pulse width of the first pulse is independently adjustable from the amplitude or the pulse width of the second pulse.

An oscillator circuit includes a first integrator unit to charge a first capacitor at a first integration node, a second integrator unit to charge a second capacitor at a second integration node, a chopped comparator unit and a logic unit. The chopped comparator unit includes a switching unit, a sensing comparator and a replica comparator. The switching unit is configured to couple the first integration node, the second integration node and a reference voltage VREF to the sensing comparator and the replica comparator, depending upon a phase determined by a first input clock signal C1 and a second input clock signal C2, which have opposite phases. The logic unit is configured to generate signals C1, C2, D1, D2, E1, E2 for controlling each integrator unit.