Described is an apparatus which comprises: a current source to generate a current having AC and DC components; a current-to-voltage converter to convert the current or a copy of the current to a voltage proportional to a resistance, the voltage having AC and DC components that correspond to the AC and DC components of the current; a first sample-and-hold circuit to sample and filter the AC component from the voltage and to provide an output voltage with the DC component; a second sample-and-hold circuit to sample the output voltage; a voltage-to-current converter to convert the sampled output voltage to a corresponding current; and an amplifier to receive the output voltage.

A waveform shaping circuit includes a capacitor, an impedance element, a switch circuit, and a switch control circuit. Opposite ends of the capacitor are connected to the input and output, respectively. One end of the impedance element supplies a target constant voltage to the output end of the capacitor. The switch circuit has a switch without a diode. When on, the switch applies the target constant voltage to the output. When off, it does not. The switch control circuit switches the switch on during a high voltage period in an AC component of an input pulse signal and switches the switch off during a low voltage period of the AC component. The circuit shapes the input pulse signal into an output pulse signal whose peak-to-peak voltage is equivalent to a peak-to-peak voltage of the AC component and whose voltage during the high voltage period is at the target constant voltage.

An apparatus for reducing or removing a direct current (DC) offset voltage from one or more analog signals is disclosed. An analog signal may be received by an integrator. The integrator may integrate the analog signal to determine a DC offset error signal. The apparatus may integrate, invert, and amplify the DC offset error signal to provide an analog correction signal. The analog correction signal may be inverted and subtracted from the analog signal. In some implementations, the apparatus may include multiple, independent circuits to reduce or remove DC offset voltages from differential signals.

Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.

Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.

The present disclosure is directed to a system that includes a sensor and a signal conditioner coupled to the sensor. The signal conditioner includes signal processing circuitry coupled to the sensor and offset cancellation circuitry. The offset cancellation circuitry includes a sign detector configured to output a high signal or a low signal based on a sign of an output signal from the signal processing circuitry, an integrator coupled to the sign detector, and a divider coupled to the integrator and to an input of the signal processing circuitry.

The present disclosure is directed to a system that includes a sensor and a signal conditioner coupled to the sensor. The signal conditioner includes signal processing circuitry coupled to the sensor and offset cancellation circuitry. The offset cancellation circuitry includes a sign detector configured to output a high signal or a low signal based on a sign of an output signal from the signal processing circuitry, an integrator coupled to the sign detector, and a divider coupled to the integrator and to an input of the signal processing circuitry.

An electrosurgical generator supplies, during operation, a high-frequency alternating current to an electrosurgical instrument for plasma cutting of body tissue. The electrosurgical generator has outputs for connecting an electrosurgical instrument to supply an electrosurgical instrument connected to the outputs with a high-frequency alternating current, and for determining the impedance of a load connected to the outputs. The electrosurgical generator features impedance and voltage measuring units as well as an output voltage control unit. The output voltage control unit is designed to control the AC output voltage depending on a maximum output voltage value that is set during operation depending on an output value of the impedance measuring unit and/or depending on an output value of the voltage measuring unit, such that the maximum output voltage value predefines a lower AC output voltage during a vaporization phase than during an ignition phase occurring subsequently to the vaporization phase.