Patent classifications
H03K5/125
APPARATUS AND METHODS FOR REMOVING A LARGE-SIGNAL VOLTAGE OFFSET FROM A BIOMEDICAL SIGNAL
Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.
Systems and Methods to Visually Align Signals Using Delay
Systems, methods, and computer program product embodiments are disclosed for processing and displaying multiple signals in near real-time. An embodiment operates by processing, using a first digital signal processor (DSP) of a first signal module, a first packet associated with a first signal. The embodiment also processes, using a second DSP of a second signal module, a second packet associated with a second signal. The embodiment equalizes a first processing delay associated with the first DSP with a second processing delay associated with the second DSP such that the first DSP completes processing of the first packet approximately simultaneously with the second DSP completing processing of the second packet. The embodiment then displays the processed first packet approximately simultaneously with the display of the processed second packet.
Signal transmission circuit
A signal transmission circuit includes a primary element configured to receive differential signals which are generated from a transmission signal and contain alternating-current (AC) components, a secondary element magnetically or capacitively coupled with the primary element and configured to output AC signals containing the AC components of the differential signals, a secondary circuit including a pair of transmission lines configured to propagate the AC signals. The secondary circuit is electrically connected to the secondary element and extracts the transmission signal from the AC signals. The feedback circuit feedbacks an intermediate voltage between voltages of the pair of transmission lines such that the intermediate voltage is converged to a reference voltage. This signal transmission circuit prevents the secondary circuit from malfunctioning due to noise.
Signal transmission circuit
A signal transmission circuit includes a primary element configured to receive differential signals which are generated from a transmission signal and contain alternating-current (AC) components, a secondary element magnetically or capacitively coupled with the primary element and configured to output AC signals containing the AC components of the differential signals, a secondary circuit including a pair of transmission lines configured to propagate the AC signals. The secondary circuit is electrically connected to the secondary element and extracts the transmission signal from the AC signals. The feedback circuit feedbacks an intermediate voltage between voltages of the pair of transmission lines such that the intermediate voltage is converged to a reference voltage. This signal transmission circuit prevents the secondary circuit from malfunctioning due to noise.
Methods of and apparatus for determining particle inclusion and size in molten metal
Methods and apparatus for measuring the cleanliness of molten metal. Direct current is passed through molten metal advancing through a passage. A voltage signal is analyzed for the presence of solid generally non-metallic inclusions in the metal. A method includes sampling digital data of the voltage signal to generate data samples; updating a delayed running average of the data samples to establish a baseline for identifying sudden changes in amplitude of the data samples; determining a threshold by adding a prescribed value to the baseline; identifying a possible inclusion when a significant number of data samples exceeds the threshold; storing a maximum count as the data samples using peak detection until a prescribed number of the data samples fall below the threshold; and comparing a parameter of the possible inclusion with a lookup table to categorize the possible inclusion as either (i) an actual inclusion or (ii) noise.
Methods of and apparatus for determining particle inclusion and size in molten metal
Methods and apparatus for measuring the cleanliness of molten metal. Direct current is passed through molten metal advancing through a passage. A voltage signal is analyzed for the presence of solid generally non-metallic inclusions in the metal. A method includes sampling digital data of the voltage signal to generate data samples; updating a delayed running average of the data samples to establish a baseline for identifying sudden changes in amplitude of the data samples; determining a threshold by adding a prescribed value to the baseline; identifying a possible inclusion when a significant number of data samples exceeds the threshold; storing a maximum count as the data samples using peak detection until a prescribed number of the data samples fall below the threshold; and comparing a parameter of the possible inclusion with a lookup table to categorize the possible inclusion as either (i) an actual inclusion or (ii) noise.
Systems and methods to visually align signals using delay
Systems, methods, and computer program product embodiments are disclosed for processing and displaying multiple signals in near real-time. An embodiment operates by processing, using a first digital signal processor (DSP) of a first signal module, a first packet associated with a first signal. The embodiment also processes, using a second DSP of a second signal module, a second packet associated with a second signal. The embodiment equalizes a first processing delay associated with the first DSP with a second processing delay associated with the second DSP such that the first DSP completes processing of the first packet approximately simultaneously with the second DSP completing processing of the second packet. The embodiment then displays the processed first packet approximately simultaneously with the display of the processed second packet.
Transmit/receive channel for ultrasound applications
A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.
Transmit/receive channel for ultrasound applications
A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.
Current and voltage regulation method to improve electromagnetice compatibility performance
A current regulator circuit to improve electromagnetic compatibility performance operation of an IC device includes an input to receive a regulated voltage signal, an output to provide an output voltage at a desired voltage level, the output voltage exhibiting noise from a load, a first field effect transistor FET including a first source electrode coupled to the input, a first drain electrode coupled to the output, and a first gate electrode, a voltage clamp circuit coupled to the output, the voltage clamp circuit configured to conduct a varying current based upon the noise, a constant current source to provide a constant current, and a second FET including a second source electrode coupled to the output, a second drain electrode coupled to the constant current source and to the first gate electrode, and a second gate electrode coupled to the voltage clamp circuit to mirror the varying current in the second FET.