A system includes a voltage booster circuit to receive an input voltage and provide an output voltage. A first device that is coupled to the voltage booster circuit to receive a digitized input voltage and a digitized output voltage and to determine, based on the digitized input voltage and the digitized output voltage, a first threshold level for the voltage booster circuit to operate in a pulse frequency modulation (PFM) mode. A second device that is coupled to the voltage booster circuit to receive the input voltage and the output voltage and to determine a second threshold level for the voltage booster circuit to operate in the PFM mode. A selector device that is coupled to the first device and the second device to select one of the first threshold level or the second threshold level for the voltage booster circuit.

A system includes a voltage booster circuit to receive an input voltage and provide an output voltage. A first device that is coupled to the voltage booster circuit to receive a digitized input voltage and a digitized output voltage and to determine, based on the digitized input voltage and the digitized output voltage, a first threshold level for the voltage booster circuit to operate in a pulse frequency modulation (PFM) mode. A second device that is coupled to the voltage booster circuit to receive the input voltage and the output voltage and to determine a second threshold level for the voltage booster circuit to operate in the PFM mode. A selector device that is coupled to the first device and the second device to select one of the first threshold level or the second threshold level for the voltage booster circuit.

Techniques for indicating and/or selecting a modulation and coding scheme (MCS) are disclosed. A method for selecting the MCS may comprise receiving control information, identifying a change indicator, determining a first MCS based on the control information, and modifying the first MCS based on the change indicator to determine a second MCS.

Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, including: a frequency filter configured to receive the input signal, wherein the frequency filter includes adjustable components configured to adjust the frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier includes an adjustable current source configured to adjust the current consumption of the rectifier; a reference signal generator configured to produce a reference signal; a current to voltage converter configured to convert the current of the rectified signal to a rectified voltage and to convert the current of the reference signal to a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to produce a demodulated output signal.

Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, including: a frequency filter configured to receive the input signal, wherein the frequency filter includes adjustable components configured to adjust the frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier includes an adjustable current source configured to adjust the current consumption of the rectifier; a reference signal generator configured to produce a reference signal; a current to voltage converter configured to convert the current of the rectified signal to a rectified voltage and to convert the current of the reference signal to a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to produce a demodulated output signal.

A Continuous Phase Frequency Shift Keying modulator provided to receive a series of binary symbols having a predetermined repetition period, and generate a series of sinusoidal signals comprising in sequence: a first sinusoidal signal with a first frequency in response to each received binary symbol having a first binary value; and a second sinusoidal signal with a second frequency in response to a received binary symbol having a second binary value, where the lowest of the first and second frequencies is larger than or equal to a third of the symbol rate; wherein the sinusoidal signals are shortened or lengthened with respect to the binary symbol they respond to, such that each first sinusoidal signal comprises an integer number of half periods of said first frequency and each second sinusoidal signal comprises an integer number of half periods of said second frequency.

The PWM waveform generation device comprises a time-division multiplexing module, wherein the time-division multiplexing module is configured for receiving a first preprocessing signal and a second preprocessing signal output by two system clock sources, performing a first time-division processing on the first preprocessing signal to obtain a first time-division signal, and performing a second time-division processing on the second preprocessing signal to obtain a second time-division signal according to a preset strategy, performing multiplexing processing on the first time-division signal and the second time-division signal to obtain a PWM output signal, wherein an output frequency of the PWM output signal is a default standard clock frequency. The present invention has the advantages that the cycle length of one cycle of a PWM waveform depends on cycles of two preprocessing waveforms and the number of the cycles, such that the output waveform frequency may be calibrated to a desired frequency.

Described are systems and methods for identifying the phase and polarization of independent modulation streams in quadrature channels of a coherent transmission system by using digital code. As a result, phase rotation and polarization of streams that during transmission may have become rotated and swapped around in the channel are correctly labeled and depermuted according to a known and predictable order.

Disclosed is a method for spreading spectrum, which includes: acquiring a modulation signal corresponding to a clock signal, when the clock signal is detected; and spectrum spreading the clock signal according to the modulation signal, wherein the modulation signals respectively corresponding to two adjacent clock signals are opposite in phase. The present disclosure further provides a chip, a display panel, and a computer readable storage medium. The present disclosure solves the technical problem of poor spread spectrum effect on dual clock signals.

An embodiment in accordance with the present invention provides a system and method of physically modulating a digital signal across a medium. A signal is sent one bit at a time (serially) as a period of high voltage followed by a period of low voltage. The present invention includes several major advantages. One advantage is that the code to execute the method is very lightweight. Another advantage is that the signals require no synchronization source. The signals of the present invention function as their own synchronization.