A switch circuit includes first and second transistor stacks coupled in parallel between first and second ports. The first transistor stack includes a first plurality of transistors coupled in series between the first and second ports to provide a first variably-conductive path between the first and second ports. Each transistor of the first plurality of transistors has a gate terminal coupled to a first control terminal. The second transistor stack includes a second plurality of transistors coupled in series between the first and second ports to provide a second variably-conductive path between the first and second ports. Each transistor of the second plurality of transistors has a gate terminal coupled to a second control terminal. When implemented in a transceiver, first and second drivers are configured to simultaneously configure the first and second variably-conductive paths in a low-impedance state.

An H-bridge circuit includes a supply voltage node, a first pair of transistors and a second pair of transistors. First transistors in each pair have the current paths therethrough included in current flow lines between the supply node and, respectively, a first output node and a second output node. Second transistors in each pair have the current paths therethrough coupled to a third output node and a fourth output node, respectively. The first and third output nodes are mutually isolated from each other and the second and fourth output nodes are mutually isolated from each other. The H-bridge circuit is operable in a selected one of a first, second and third mode.

An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.

In a switching circuit, an inductance of an inductor of a shunt circuit is such that off capacitance of a second switching device that is in the off state when a first switching device is in the on state is used to define, in the shunt circuit, a series resonance circuit with a desired resonant frequency. Therefore, the frequency of an unnecessary signal to be attenuated is set to the resonant frequency of the series resonance circuit. Thus, the switching circuit achieves improved isolation characteristics with other circuits by attenuating the unnecessary signal.

The disclosure provides an electrical apparatus, including a substrate, a plurality of gate driver units and a plurality of gate lines. The gate driver units are disposed on the substrate. The gate lines are disposed on the substrate. Each of the gate lines is respectively electrically connected to the corresponding gate driver unit. Each of the gate lines is configured to transmit a respective gate signal. The gate lines include a first gate line and a second gate line. The first gate line and the second gate line are configured to transmit the respective gate signals at a same time.

A method of manufacturing a transmission gate includes overlying a first active area with a first metal zero segment, the first active area including first and second PMOS transistors, overlying a second active area with a second metal zero segment, the second active area including first and second NMOS transistors, and configuring the first and second PMOS transistors and the first and second NMOS transistors as a transmission gate by forming three conductive paths. At least one of the conductive paths includes a first conductive segment perpendicular to the first and second metal zero segments, and the first and second metal zero segments have a first offset distance corresponding to three times a metal zero pitch.

A superconducting AC switch system includes a switch network configuration comprising a Josephson junction (JJ) coupled to a transmission line having a transmission line impedance, and a magnetic field generator that is configured to switch from inducing a magnetic field in a plane of the JJ, and providing no magnetic field in the plane of the JJ. An AC input signal applied at an input of the switch network configuration is passed through to an output of the switch network configuration in a first magnetic state, and substantially reflected back to the input of the switch network configuration in a second magnetic state. The first magnetic state is one of inducing and not inducing a magnetic field in a plane of the JJ, and the second magnetic state is the other of inducing and not inducing a magnetic field in a plane of the JJ.

Techniques are described for implementing diodes with low threshold voltages and high breakdown voltages. Some embodiments further implement diode devices with programmable threshold voltages. For example, embodiments can couples a native device with one or more low-threshold, diode-connected devices. The coupling is such that the low-threshold device provides a low threshold voltage while being protected from breakdown by the native device, effectively manifesting as a high breakdown voltage. Some implementations include selectable branches by which the native device is programmably coupled with any of multiple low-threshold, diode-connected devices.

A switch with clock-gating control and a method for clock gating a switch are described herein. In one example, the method generally includes detecting a state of one or more input ports and a state of one or more output ports of the switch, determining whether the state of the one or more input ports and the state of the one or more output ports has been stable for a preset number of clock cycles, and gating the switch from a clock signal until the state of the one or more input ports or the state of the one or more output ports change upon determining the states have been stable for the preset number of the cycles.

A transceiver includes a receive path including a low noise amplifier and a first switch coupled between the low noise amplifier and ground, a first transmit path including a low power amplifier and a second switch coupled between the low power amplifier and a main signal path, and a second transmit path including a high power amplifier and a third switch coupled between the main signal path and ground. The receive path is active when the first, second, and third switches are in an open position, the first transmit path is active when the first switch is in a closed position, the second switch is in the closed position, and the third switch is in the open position, and the second transmit path is active when the first switch and the third switch are in the closed position, and the second switch is in the open position.