A semiconductor device that can perform product-sum operation with low power is provided. The semiconductor device includes a switching circuit. The switching circuit includes first to fourth terminals. The switching circuit has a function of selecting one of the third terminal and the fourth terminal as electrical connection destination of the first terminal, and selecting the other of the third terminal and the fourth terminal as electrical connection destination of the second terminal, on the basis of first data. The switching circuit includes a first transistor and a second transistor each having a back gate. The switching circuit has a function of determining a signal-transmission speed between the first terminal and one of the third terminal and the fourth terminal and a signal-transmission speed between the second terminal and the other of the third terminal and the fourth terminal on the basis of potentials of the back gates. The potentials are determined by second data. When signals are input to the first terminal and the second terminal, a time lag between the signals output from the third terminal and the fourth terminal is determined by the first data and the second data.

A crossbar switch is disclosed having a first port, a second port, a third port, and a fourth port, the crossbar switch comprising: a first switching element coupled between the first port and the third port; a second switching element coupled between the first port and the fourth port; a third switching element coupled between the second port and the third port; and a fourth switching element coupled between the second port and the fourth port, wherein the first switching element, the second switching element, the third switching element, and the fourth switching element are configured to couple only one of the first port and the second port to the third port, at any given time.

This application provides a shutdown signal generation circuit and a display apparatus. The shutdown signal generation circuit includes: a first switch, where a first end of the first switch is electrically coupled to a first frequency, a control end of the first switch is electrically coupled to a first node, and a second end of the first switch is electrically coupled to a second node; and a second switch, wherein a first end of the second switch is electrically coupled to a second frequency, a control end of the second switch is electrically coupled to the first node, and a second end of the second switch is electrically coupled to the second node, where the first node is electrically coupled to a control signal, and the second node electrically outputs a gate shutdown signal.

An output stage circuit includes a first operational amplifier, a second operational amplifier, a switch circuit, a clamp circuit and at least one pull-low transistor. The first operational amplifier is operated in a first voltage domain. The second operational amplifier is operated in a second voltage domain. The switch circuit is coupled to the first operational amplifier and the second operational amplifier. The clamp circuit is coupled between the switch circuit and a plurality of output terminals of the output stage circuit. The at least one pull-low transistor is coupled to the switch circuit.

A supply voltage supervisor circuit includes a comparator circuit. The comparator circuit includes a first input terminal, a second input terminal, a first transistor, and a second transistor. The first transistor has a first threshold voltage, and includes a first terminal coupled to the first input terminal. The second transistor has a second threshold voltage that is different from the first voltage threshold, and includes a first terminal coupled to the second input terminal, and a second terminal coupled to a second terminal of the first transistor. A trip point of the comparator circuit is based on a difference of the first threshold voltage and the second threshold voltage.

An H-bridge circuit includes a supply voltage node, a first pair of transistors and a second pair of transistors. First transistors in each pair have the current paths therethrough included in current flow lines between the supply node and, respectively, a first output node and a second output node. Second transistors in each pair have the current paths therethrough coupled to a third output node and a fourth output node, respectively. The first and third output nodes are mutually isolated from each other and the second and fourth output nodes are mutually isolated from each other. The H-bridge circuit is operable in a selected one of a first, second and third mode.

A switch circuit provided on a substrate includes a first series switch and a second series switch disposed in series on a path connecting a first terminal and a second terminal, a third series switch and a fourth series switch disposed in series on a path connecting the first terminal and a third terminal, a first shunt switch connected to a common ground terminal and a first node between the first series switch and the second series switch, and a second shunt switch connected to the common ground terminal and a second node between the third series switch and the fourth series switch.

Techniques are described for implementing diodes with low threshold voltages and high breakdown voltages. Some embodiments further implement diode devices with programmable threshold voltages. For example, embodiments can couples a native device with one or more low-threshold, diode-connected devices. The coupling is such that the low-threshold device provides a low threshold voltage while being protected from breakdown by the native device, effectively manifesting as a high breakdown voltage. Some implementations include selectable branches by which the native device is programmably coupled with any of multiple low-threshold, diode-connected devices.

A circuit for providing an adjustable output driver current for use in LiDAR or other similar GaN driver applications. The circuit creates an appropriate gate-to-source voltage, V.sub.GS, for a high-current GaN driver FET to obtain a desired, high slew-rate driver current, I.sub.DRV. An externally provided reference current is used to create the required V.sub.GS for the driver FET, which is stored on an external capacitor. The value of the capacitor far exceeds the relatively low input-capacitance of the GaN driver FET. When a pulse I.sub.DRV of desired value is needed, the voltage on the capacitor is impinged upon the gate of the driver FET, thereby creating the desired I.sub.DRV. The reference charging circuit replenishes any charge lost on the capacitor, so that the same desired I.sub.DRV can be obtained on the next command pulse.

This application provides a shutdown signal generation circuit and a display apparatus. The shutdown signal generation circuit includes: a first switch, where a first end of the first switch is electrically coupled to a first frequency, a control end of the first switch is electrically coupled to a first node, and a second end of the first switch is electrically coupled to a second node; and a second switch, wherein a first end of the second switch is electrically coupled to a second frequency, a control end of the second switch is electrically coupled to the first node, and a second end of the second switch is electrically coupled to the second node, where the first node is electrically coupled to a control signal, and the second node electrically outputs a gate shutdown signal.