A system includes an output terminal and a linear switch circuit coupled to the output terminal. The linear switch circuit includes a first power field-effect transistor (FET) having: a first channel width; a control terminal; a first current terminal; and a second current terminal, wherein the second current terminal is coupled to the output terminal. The linear switch circuit also includes a second power FET having: a second channel width smaller than the first channel width; a control terminal; a first current terminal coupled to the first current terminal of the first power FET; and a second current terminal coupled to the output terminal. The system also comprises a control circuit coupled to the control terminal of the first power FET and to the control terminal of the second power FET. The control circuit detects a drain-to-source voltage (V.sub.DS) saturation condition and controls the first and second power FETs accordingly.

A system may include a sensor configured to output a sensor signal indicative of a distance between the sensor and a mechanical member associated with the sensor, a measurement circuit communicatively coupled to the sensor and configured to determine a physical force interaction with the mechanical member based on the sensor signal, and a compensator configured to monitor the sensor signal and to apply a compensation factor to the sensor signal to compensate for changes to properties of the sensor based on at least one of changes in a distance between the sensor and the mechanical member and changes in a temperature associated with the sensor.

A system may include a sensor configured to output a sensor signal indicative of a distance between the sensor and a mechanical member associated with the sensor, a measurement circuit communicatively coupled to the sensor and configured to determine a physical force interaction with the mechanical member based on the sensor signal, and a compensator configured to monitor the sensor signal and to apply a compensation factor to the sensor signal to compensate for changes to properties of the sensor based on at least one of changes in a distance between the sensor and the mechanical member and changes in a temperature associated with the sensor.

A semiconductor element drive device is provided to solve a problem that because a case of a change in the temperature of the semiconductor element or a current flowing through the semiconductor element is not take into consideration, switching loss and noise cannot be reduced sufficiently. In accordance with input sensing information (temperature T, current I), a timing control unit 3 outputs a delay signal Q to control timing of driving a current increasing circuit 5 so that a reduction of switching loss of an IGBT 101 is maximized. When the IGBT 101 is in turn-on mode or turn-off mode, the current increasing circuit 5 outputs a drive signal in response to the delay signal Q delayed by a given time from output of the drive instruction signal P. In this way, the current increasing circuit 5 increases the current that causes the gate capacitor of the IGBT 101 to be charged/discharged in response to the delay signal Q, thereby increasing a switching speed to reduce switching loss.

A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.

Current sharing among bidirectional double-base bipolar junction transistors. One example is a method comprising: conducting current through a first bidirectional double-base bipolar junction transistor (first B-TRAN); conducting current through a second B-TRAN the second B-TRAN coupled in parallel with the first B-TRAN; measuring a value indicative of conduction of the first B-TRAN, and measuring a value indicative of conduction of the second B-TRAN; and adjusting a current flow through the first B-TRAN, the adjusting responsive to the value indicative of conduction of the first B-TRAN being different than the value indicative of conduction of the second B-TRAN.

Methods and apparatus to provide an adaptive gate driver for switching devices are disclosed. An example apparatus includes an electrical switch to drive an electrical system; a condition characterizer to select a drive strength based on a first system parameter corresponding to the electrical system, the first system parameter including at least one of an input voltage corresponding to the electrical switch, an output current corresponding to the electrical switch, or a process variation of the electrical switch; and a driver to generate an output having a current corresponding to the selected drive strength.

A temperature-compensated low-pass filter includes a differential amplifier that controls a first transistor to pass a subthreshold current through the transistor to charge a capacitor with low-pass-filtered output voltage. A second transistor has a first terminal coupled to an input terminal of the low-pass filter and has a second terminal coupled to a current source conducting a bias current. The differential amplifier also controls the second transistor to conduct the bias current responsive to a difference between a complementary-to-absolute-temperature reference voltage and a voltage of the second terminal of the second transistor.

A power on reset circuit comprises terminals for reference and supply potentials and a voltage divider coupled therebetween. First and second transistors of a bandgap circuit are resistively coupled to the reference potential terminal and have bases connected to the voltage divider. Current mirrors couple the collectors of the first and second transistors to an output terminal providing an output signal indicating a power on reset condition. A first compensation transistor is coupled between the collector of one of the transistors and the reference potential terminal, and a second compensation transistor is coupled between the output terminal and the reference potential terminal to compensate the effect of parasitic substrate currents in response to an external interference.

A power on reset circuit comprises terminals for reference and supply potentials and a voltage divider coupled therebetween. First and second transistors of a bandgap circuit are resistively coupled to the reference potential terminal and have bases connected to the voltage divider. Current mirrors couple the collectors of the first and second transistors to an output terminal providing an output signal indicating a power on reset condition. A first compensation transistor is coupled between the collector of one of the transistors and the reference potential terminal, and a second compensation transistor is coupled between the output terminal and the reference potential terminal to compensate the effect of parasitic substrate currents in response to an external interference.