A conversion circuit includes a main device including a first terminal, a second terminal and a control terminal, and a voltage control switching circuit including a first terminal configured to receive an first driving signal, a second terminal coupled to the control terminal of the main device and configured to transmit a second driving signal to drive the main device, and a reference terminal coupled to the second terminal of the main device. A current passing through the voltage control switching device is controlled in response to a voltage level of the reference terminal.

A semiconductor device comprises a first transistor with a silicon carbide layer between the source and the drain electrodes and between the gate and drain electrodes. A diode is formed in the silicon carbide layer. A forward voltage of the diode varies with the voltage applied to the gate electrode of the first transistor. A second transistor is connected to the first transistor. A gate controller applies voltages to gates of the first and second transistor such that the first and second transistors are set to an off-state a first time. The first gate voltage is then increased to an intermediate voltage that is less than a threshold voltage of the first transistor. The intermediate voltage is sufficient to alter the forward voltage of the diode and permit a forward current to flow in the diode. The first gate voltage is then increased to an on-state voltage.

A semiconductor device comprises a first transistor with a silicon carbide layer between the source and the drain electrodes and between the gate and drain electrodes. A diode is formed in the silicon carbide layer. A forward voltage of the diode varies with the voltage applied to the gate electrode of the first transistor. A second transistor is connected to the first transistor. A gate controller applies voltages to gates of the first and second transistor such that the first and second transistors are set to an off-state a first time. The first gate voltage is then increased to an intermediate voltage that is less than a threshold voltage of the first transistor. The intermediate voltage is sufficient to alter the forward voltage of the diode and permit a forward current to flow in the diode. The first gate voltage is then increased to an on-state voltage.

Provided is a semiconductor device capable of preventing a malfunction of a high-side gate driver circuit that is caused by a negative voltage surge. A diode is connected between a p-type bulk substrate configuring a semiconductor layer, and a first potential (GND potential), and a signal is transmitted from a control circuit that is formed in an n diffusion region configuring a first semiconductor region through a first level down circuit and a first level up circuit to a high-side gate driver circuit that is formed in an n diffusion region configuring a second semiconductor region. As a result, a malfunction of the high-side gate driver circuit that is caused by a negative voltage surge can be prevented.

Provided is a semiconductor device capable of preventing a malfunction of a high-side gate driver circuit that is caused by a negative voltage surge. A diode is connected between a p-type bulk substrate configuring a semiconductor layer, and a first potential (GND potential), and a signal is transmitted from a control circuit that is formed in an n diffusion region configuring a first semiconductor region through a first level down circuit and a first level up circuit to a high-side gate driver circuit that is formed in an n diffusion region configuring a second semiconductor region. As a result, a malfunction of the high-side gate driver circuit that is caused by a negative voltage surge can be prevented.

A diving circuit drives an output transistor according to a control signal S.sub.CTRL. The gate of the first transistor is biased. The source of the first transistor is coupled to an internal line. In the on period of the output transistor, the voltage of the internal line is applied to a control electrode of the output transistor. A voltage correction circuit controls the internal line so as to gradually lower the voltage V.sub.REGB of the internal line with time.

A diving circuit drives an output transistor according to a control signal S.sub.CTRL. The gate of the first transistor is biased. The source of the first transistor is coupled to an internal line. In the on period of the output transistor, the voltage of the internal line is applied to a control electrode of the output transistor. A voltage correction circuit controls the internal line so as to gradually lower the voltage V.sub.REGB of the internal line with time.

Non-ideal diodes have a non-zero resistance across a PN junction when the junction is forward biased. When a diode comprising a power supply has a voltage drop across the junction that exceeds a predetermined threshold, the threshold-exceeding voltage drop trips a comparator, the output of which controls a switch between a power supply and a load.

Non-ideal diodes have a non-zero resistance across a PN junction when the junction is forward biased. When a diode comprising a power supply has a voltage drop across the junction that exceeds a predetermined threshold, the threshold-exceeding voltage drop trips a comparator, the output of which controls a switch between a power supply and a load.

In one example, a circuit includes an input, an output, and a control module. The input is configured to receive a control signal indicating whether to activate or deactivate a load. The output is configured to supply current to activate the load. The control module is configured to determine whether a state of the circuit is a low current consumption mode (LCCM). In response to determining that the state of the circuit is not the LCCM, the control module is configured to determine whether the control signal indicates to activate the load and output, at the output, the current to activate the load. In response to determining that the state of the circuit is the LCCM, the control module is configured to ignore the control signal indicating whether to activate or deactivate the load and output, at the output, the current to activate the load.