A field-effect transistor (FET) based synchronous rectifier for emulating a diode, comprising: a first terminal (20) and a second terminal (30); a first FET (M1) and a second ELT (M2), wherein the second FET (M2) is adapted to control operation of the first FET (M1) to thereby allow unidirectional current flow when the two terminals (20, 30) are connected with an external circuit; and wherein the FET based synchronous rectifier comprises a fully integrated single-chip device (10) adapted to emulate a diode.

A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.

The present disclosure provides a switching current source circuit and a method for quickly establishing a switching current source. The switching current source circuit includes a first and a second switching current source branches connected in parallel with one end of a load. When the switching enable signal is switched, due to the charge coupling of the first and second switching current source branches, the bias voltage respectively generates bounce in the same direction as and a direction opposite to the transition direction of the switching enable signal. The two bounces cancel each other to make the current source bias voltage recover quickly when a toggle event happens. The present disclosure accelerates the establishment of current through the coupling of charges, and reduces the decoupling capacitance at the same time, thereby reducing the circuit area and saving the costs.

Switch circuitry including an input terminal (1), said input terminal connected to the base of a first transistor (Q1) via a first resistor (R3), said first transistor being an NPN Bipolar Gate Transistor (Q1), said circuitry further comprising a second resistor (R5) connected between the base of said first transistor (Q1) and ground, and including an output line or terminal (3) connected to the collector of said first transistor (Q1), and wherein the emitter of said first transistor (Q1) is connected to ground (earth), said circuitry further including a second transistor (Q2), said second transistor being a PNP Bipolar Gate Transistor, wherein the collector of said second transistor (Q2) is connected via a third resistor (R8) to the base of said first transistor (Q1), and the emitter of said second transistor (Q2) is connected to said input terminal (1), and wherein the emitter of said second transistor (Q2) is additionally connected to the base of said second transistor (Q2) via a fourth resistor (R11); and the base of said second transistor (Q2) being additionally connected to the output terminal (3) via a fifth resistor (R10) and a diode (D1).

Embodiments relate to circuit for reversing a threshold voltage shift of a transistor. The circuit includes a current mirror for sensing a transistor current and generating a mirrored current corresponding to the sensed transistor current, a gate biasing module for providing a gate bias to the transistor, and a calibration engine configured to receive the mirrored current from the current mirror and to control the gate biasing module in response to determining whether the mirrored current is outside of a predetermined range indicative of a shift in the threshold voltage of the transistor. The gate biasing module includes a gate biasing circuit configured to operate the transistor in a region where hot carrier injection (HCI) is present, and a gate switch for coupling the gate biasing circuit to a gate terminal of the transistor.

According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

A solid-state relay includes a semiconductor switch and a voltage boost block. The semiconductor switch has a control input, which causes the semiconductor switch to shift from an open, non-conducting position to a closed, conducting position when a voltage is applied to the control input. The voltage boost block includes a boost converter and a ground connector. A voltage output of the semiconductor switch is electrically connected to a voltage input of the boost converter. A voltage output of the boost converter is electrically connected to the control input. The ground connector of the boost converter is electrically connected to a voltage input of the semiconductor switch When the semiconductor switch is in the closed position, the semiconductor switch is maintained in a closed position in the absence of another control signal.

Provided is a switching circuit including an input terminal, a switching terminal, a ground terminal, a bootstrap terminal, a high side transistor connected to the input terminal and the switching terminal, a low side transistor connected to the switching terminal and the ground terminal, a bootstrap capacitor connected to the switching terminal and the bootstrap terminal, a bootstrap switch including a PMOS transistor, and a driver circuit that turns on the bootstrap switch in a period in which the low side transistor is on and that turns off the bootstrap switch in a period in which the low side transistor is off, in which the driver circuit includes a level shifter and a buffer, and the level shifter includes an output line, a first resistance, a first transistor, a second resistance, a third resistance, a second transistor, a third transistor, a first capacitor, and a fourth transistor.

Provided is a switching circuit including an input terminal, a switching terminal, a ground terminal, a bootstrap terminal, a high side transistor connected to the input terminal and the switching terminal, a low side transistor connected to the switching terminal and the ground terminal, a bootstrap capacitor connected to the switching terminal and the bootstrap terminal, a bootstrap switch including a PMOS transistor, and a driver circuit that turns on the bootstrap switch in a period in which the low side transistor is on and that turns off the bootstrap switch in a period in which the low side transistor is off, in which the driver circuit includes a level shifter and a buffer, and the level shifter includes an output line, a first resistance, a first transistor, a second resistance, a third resistance, a second transistor, a third transistor, a first capacitor, and a fourth transistor.

The present technology includes a replica circuit and an oscillator including the same. The replica circuit includes a first terminal to which a replica voltage having a positive voltage is supplied, a second terminal to which a ground voltage is supplied, a replica main circuit connected between the first terminal and the second terminal and configured to form a first current path in response to the replica voltage, and a replica sub circuit connected in parallel with the replica main circuit between the first terminal and the second terminal and configured to form a second current path in response to the replica voltage. A current flowing through the second current path having a replica sub current amount is less than a current flowing through the first current path having a replica main current amount.