Disclosed are a circuit unit, a circuit module and an apparatus for data statistics. The circuit unit comprises a first register and a second register, and stores data received via a first input terminal in the first register in a case where a first control terminal receives a valid control signal, stores data received via a second input terminal in the second register in a case where a second control terminal receives a valid control signal, and increases the value of data stored in the second register by 1 in a case where a third control terminal receives a valid control signal. The circuit module comprises one or more such circuit units, and the apparatus comprises one or more such circuit modules. The circuit module or the apparatus may use smaller resource and smaller power consumption to complete data statistics.

Disclosed are a circuit unit, a circuit module and an apparatus for data statistics. The circuit unit comprises a first register and a second register, and stores data received via a first input terminal in the first register in a case where a first control terminal receives a valid control signal, stores data received via a second input terminal in the second register in a case where a second control terminal receives a valid control signal, and increases the value of data stored in the second register by 1 in a case where a third control terminal receives a valid control signal. The circuit module comprises one or more such circuit units, and the apparatus comprises one or more such circuit modules. The circuit module or the apparatus may use smaller resource and smaller power consumption to complete data statistics.

A system and method for a decimated phase detector circuit includes a bang bang phase detector (BBFD), an UP rolling counter connected to an UP output of the BBFD, and a DOWN rolling counter connected to a DOWN output of the BBFD. A charge pump is connected to the UP rolling counter and the DOWN rolling counter and is configured to receive a decimated UP signal from the UP rolling counter and a decimated DOWN signal from the DOWN rolling counter. The charge pump is further configured to provide a control voltage according to the received decimated UP signals and decimated DOWN signals.

A system and method for a decimated phase detector circuit includes a bang bang phase detector (BBFD), an UP rolling counter connected to an UP output of the BBFD, and a DOWN rolling counter connected to a DOWN output of the BBFD. A charge pump is connected to the UP rolling counter and the DOWN rolling counter and is configured to receive a decimated UP signal from the UP rolling counter and a decimated DOWN signal from the DOWN rolling counter. The charge pump is further configured to provide a control voltage according to the received decimated UP signals and decimated DOWN signals.

Disclosed are a circuit unit, a circuit module and an apparatus for data statistics. The circuit unit comprises a first register and a second register, and stores data received via a first input terminal in the first register in a case where a first control terminal receives a valid control signal, stores data received via a second input terminal in the second register in a case where a second control terminal receives a valid control signal, and increases the value of data stored in the second register by 1 in a case where a third control terminal receives a valid control signal. The circuit module comprises one or more such circuit units, and the apparatus comprises one or more such circuit modules. The circuit module or the apparatus may use smaller resource and smaller power consumption to complete data statistics.