A light-receiving apparatus (1a) includes a counting unit (11), a setting unit (12), and an acquiring unit (13). The counting unit is configured to measure a detection number of times that represents the number of times incidence of a photon to a light-receiving element has been detected within an exposure period and to output a counted value. The setting unit is configured to set a cycle of updating time information in accordance with an elapsed time during the exposure period. The acquiring unit is configured to acquire the time information indicating a time at which the counted value reaches a threshold before the exposure period elapses.

Circuits and systems for generating counter signals are provided herein. A circuit may comprise a shift register having a series of flip-flops. Each of the flip-flops of the series may be coupled to a clock. The shift register may generate a borrowing clock signal using an output of a flip-flop of the shift register, and a transition of the borrowing clock signal may be advanced by a number of clock cycles based on a position of the flip-flop of the shift register. The circuit may further comprise a clock divider circuit having a number of divide-by-N counters and a number of flip-flops. A divide-by-N counter may be coupled to a flip-flop of the shift register, and a flip-flop of the clock divider circuit may be coupled to one of the divide-by-N counters and to the clock.

A motor control system includes a variable voltage supply in signal communication with a direct current (DC) motor. The DC motor includes a rotor induced to rotate in response to a drive current generated by a variable supply voltage delivered by the voltage supply. The rotation of the rotor generates a mechanical force that drives a component. A ripple count circuit is configured to filter the drive current based on a rotational speed (ω) of the rotor, and to generate a pulsed output signal indicative of the rotational speed (ω) of the rotor and a rotational position (θ) of the rotor.

A motor control system includes a variable voltage supply in signal communication with a direct current (DC) motor. The DC motor includes a rotor induced to rotate in response to a drive current generated by a variable supply voltage delivered by the voltage supply. The rotation of the rotor generates a mechanical force that drives a component. A ripple count circuit is configured to filter the drive current based on a rotational speed (ω) of the rotor, and to generate a pulsed output signal indicative of the rotational speed (ω) of the rotor and a rotational position (θ) of the rotor.

A light-receiving apparatus (1a) includes a counting unit (11), a setting unit (12), and an acquiring unit (13). The counting unit is configured to measure a detection number of times that represents the number of times incidence of a photon to a light-receiving element has been detected within an exposure period and to output a counted value. The setting unit is configured to set a cycle of updating time information in accordance with an elapsed time during the exposure period. The acquiring unit is configured to acquire the time information indicating a time at which the counted value reaches a threshold before the exposure period elapses.

A light-receiving apparatus (1a) includes a counting unit (11), a setting unit (12), and an acquiring unit (13). The counting unit is configured to measure a detection number of times that represents the number of times incidence of a photon to a light-receiving element has been detected within an exposure period and to output a counted value. The setting unit is configured to set a cycle of updating time information in accordance with an elapsed time during the exposure period. The acquiring unit is configured to acquire the time information indicating a time at which the counted value reaches a threshold before the exposure period elapses.

A light-receiving apparatus (1a) includes a counting unit (11), a setting unit (12), and an acquiring unit (13). The counting unit is configured to measure a detection number of times that represents the number of times incidence of a photon to a light-receiving element has been detected within an exposure period and to output a counted value. The setting unit is configured to set a cycle of updating time information in accordance with an elapsed time during the exposure period. The acquiring unit is configured to acquire the time information indicating a time at which the counted value reaches a threshold before the exposure period elapses.

A light-receiving apparatus (1a) includes a counting unit (11), a setting unit (12), and an acquiring unit (13). The counting unit is configured to measure a detection number of times that represents the number of times incidence of a photon to a light-receiving element has been detected within an exposure period and to output a counted value. The setting unit is configured to set a cycle of updating time information in accordance with an elapsed time during the exposure period. The acquiring unit is configured to acquire the time information indicating a time at which the counted value reaches a threshold before the exposure period elapses.

Embodiments relate to a clock counter, a method for clock counting, and a storage apparatus. The clock counter includes a clock frequency-dividing circuit, a plurality of counting circuits, and an adding circuit. The clock frequency-dividing circuit receives a clock signal and divide a frequency of the clock signal to output a plurality of frequency-divided clock signals, sum of number of pulses of the plurality of frequency-divided clock signals being equal to number of pulses of the clock signal. The plurality of counting circuits are connected to the clock frequency-dividing circuit, each of the plurality of counting circuits being configured to respectively count pulses for each of the plurality of frequency-divided clock signals and generate an initial count value. The adding circuit is connected to the plurality of counting circuits, and adds up the initial count values of the plurality of counting circuits to generate a target count value.

In described examples, a counter system includes a counter, a parity detector, a toggle flop, and a comparator. The counter iterates a count through a set of binary states in response to a clock signal, so that a binary value of a single bit of the count changes at each iteration. The parity detector detects the parity of the count. The toggle flop output is coupled to the toggle flop input. The toggle flop outputs a binary flop value. The binary flop value toggles between zero and one in response to the toggle flop input and the clock signal. The comparator compares the parity of the count and the toggle flop output, and outputs a first comparator value if the parity of the count and the toggle flop output are the same, and a second comparator value if the parity of the count and the toggle flop output are different.