A buck-boost converter having dual-folded bootstrap for driver metal oxide semiconductor (DrMOS) device that, in addition to the traditional bootstrap capacitors, include folded bootstrap capacitors that cross-couple inductor nodes to the two sets of DrMOS switches. The DrMOS switches can be n-type or p-type, and can be replaced with driver Gallium Nitride (DrGaN) devices.

A driving apparatus includes a current output unit, a reference voltage output unit, a comparator, and a drive control unit. The current output unit is switchable to either a first ON resistance or a second ON resistance that is N times (N>1) the first ON resistance. The reference voltage output unit outputs a fist reference voltage during a large current time period, and outputs a second reference voltage that is M times (M>1) the first reference voltage during a small current time period. The drive control unit performs control to perform switching to the first ON resistance during the large current time period, and to perform switching to the second ON resistance during the small current time period.

An electronic circuit includes a noise source and an analog circuit and a logic circuit that may be adversely affected by noise. At least a portion of the analog circuit and the logic circuit is formed on a buried impurity layer whose conductivity is different from that of a substrate, and at least a portion of the periphery of that portion is surrounded by an impurity layer that is different from the substrate. Thus, propagation of the noise from the noise source is prevented.

A drive apparatus that drives a control terminal of a main switching element establishing/cutting off an electrical connection between a first main terminal and a second main terminal is provided, including first to fourth switching elements establishing/cutting off electrical connections between a positive terminal of a power source and the control terminal, the positive terminal and the second main terminal, the control terminal and a negative terminal of the power source, and the second main terminal and the negative terminal, respectively, and a resistance of at least one among a path between the control terminal and the second main terminal via the first to second switching elements, a path via the first and fourth switching elements, a path via the second to third switching elements, and a path via the third to fourth switching element is different from a resistance of at least one of the others.

To suppress a leakage current flowing through a parasitic capacitor of an insulated transformer of a high-side insulated power. The present invention suppresses a common mode current using a common mode reactor by focusing on the fact that a leakage current flowing through a parasitic capacitor of an insulated transformer of a high-side insulated power source resulting from a high-frequency signal generated due to an on/off operation of a high-side switching element is the common mode current. The common mode reactor reduces the common mode current and bears the high-frequency signal to prevent the high-frequency signal from being applied to the insulated transformer of the high-side insulated power source, suppress the leakage current flowing through the parasitic capacitor of the insulated transformer, and reduce an erroneous operation of the high-side switching element generated due to the leakage current flowing through the parasitic capacitor of the insulated transformer.

A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and a control electrode between the semiconductor part and the first electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer and the fifth layer are selectively provided between the first layer and the second electrode. In a method for controlling the semiconductor device, first to third voltages are applied in order to the control electrode while a p-n junction between the first and second layers is biased in a forward direction. The second and third voltages are greater than the first voltage, and the third voltage is less than the second voltage.

A load driving device includes an H bridge circuit that includes a first upstream switching element, a first downstream switching element, a second upstream switching element, a second downstream switching element, a first output terminal between the first upstream switching element and the second downstream switching element, and a second output terminal between the second upstream switching element and the first downstream switching element. A first load is connected between the first output terminal and the second output terminal, and a second load is connected between a ground potential point and one of the first output terminal and the second output terminal.

Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

The present application relates to an isolated drive circuit, of the type commonly employed as high side drivers, for providing a drive signal to a semiconductor switch. The isolated drive circuit comprises a transformer with primary and secondary windings. The circuit further comprises a primary side circuit having a plurality of switches arranged in a bridge configuration with the primary winding positioned across the output of the bridge and a secondary side circuit connected to the secondary winding of the transformer and having a drive circuit output for providing a drive signal to the semiconductor switch. The advantage of this approach is that the entire circuit can be constructed as a module for use as a single component on a circuit board without requiring additional external components.