A lens driver or lens driver circuitry for an ophthalmic apparatus comprising an electronic system which actuates a variable-focus optic is disclosed herein. The lens driver is part of an electronic system incorporated into the ophthalmic apparatus. The electronic system includes one or more batteries or other power sources, power management circuitry, one or more sensors, clock generation circuitry, control algorithms and circuitry, and lens driver circuitry. The lens driver circuitry includes one or more power sources, one or more high voltage generators and one or more switching circuits. Specifically, the lens driver comprises an H-bridge/H-bridge controller for providing the proper voltage, including polarity, to drive the electronic included in the ophthalmic apparatus.

A gate driver circuit for a half bridge or full bridge output driver stage having a high side branch connected to one or more high side transistors and a low side branch connected to one or more low side transistors. A high side gate driver and a low side gate driver receive input signals at a low voltage level and output signals at a high voltage level as gate driving signals for the high side transistors and low side transistors. Each of the high side and the low side branches of the gate driver includes a set-reset latch having a signal output that is fed as a gate signal to the corresponding transistor of the half bridge or full bridge driver. A differential capacitive level shifter circuit receives the input signals at a low voltage level and outputs high voltage signals to drive the set and reset inputs of the set-reset latch.

This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.

A rectifier includes: first and second high side switches including source terminals connected to an alternating current input terminal and drain terminals connected to one end of an output capacitor; first and second low side switches including drain terminals connected to the alternating current input terminal and source terminals connected to a ground terminal and another end of the output capacitor; and a cross connector configured to allow parasitic capacitance of the first high side switch or the second high side switch to flow to a ground when the first high side switch or the second high side switch is turned off.

A semiconductor device comprises a first transistor with a silicon carbide layer between the source and the drain electrodes and between the gate and drain electrodes. A diode is formed in the silicon carbide layer. A forward voltage of the diode varies with the voltage applied to the gate electrode of the first transistor. A second transistor is connected to the first transistor. A gate controller applies voltages to gates of the first and second transistor such that the first and second transistors are set to an off-state a first time. The first gate voltage is then increased to an intermediate voltage that is less than a threshold voltage of the first transistor. The intermediate voltage is sufficient to alter the forward voltage of the diode and permit a forward current to flow in the diode. The first gate voltage is then increased to an on-state voltage.

A power conversion device includes a first switch and a second switch connected in series between a positive electrode and a negative electrode of a first power supply. A first node is between the first and second switches. The first node can be connected to a load. A first diode has an anode connected to the first node and a cathode connected to the positive electrode of the first power supply. A third switch is connected between a positive electrode of a second power supply and the positive electrode of the first power supply. A first timer is connected to a gate electrode of the third switch. A first comparator has a first input that is connected to a gate electrode of the first switch, a second input at which a reference voltage can be received, and an output that is connected to the first timer.

A drive control device includes a MOS transistor, voltage measuring circuits, a correction circuit, and a control circuit. The voltage measuring circuits measure a drain-to-source voltage when a forward drain current flows through the MOS transistor and when a reverse drain current flows in the MOS transistor. The correction circuit sets a current setting voltage level when the reverse drain current flows, where the current setting voltage level is proportional to the voltage between the drain and the source when a predetermined reverse setting current flows in the MOS transistor. The control circuit controls ON/OFF of the MOS transistor in response to a control signal reflecting a measured value of the first voltage measuring circuit when the forward drain current flows through the MOS transistor and the current setting voltage level that is set by the correction circuit when the reverse drain current flows in the MOS transistor.

A lens driver or lens driver circuitry for an ophthalmic apparatus comprising an electronic system which actuates a variable-focus optic is disclosed herein. The lens driver is part of an electronic system incorporated into the ophthalmic apparatus. The electronic system includes one or more batteries or other power sources, power management circuitry, one or more sensors, clock generation circuitry, control algorithms and circuitry, and lens driver circuitry. The lens driver circuitry includes one or more power sources, one or more high voltage generators and one or more switching circuits. Specifically, the lens driver comprises an H-bridge/H-bridge controller for providing the proper voltage, including polarity, to drive the electronic included in the ophthalmic apparatus.

The present disclosure relates to a circuit arrangement which comprises one high-efficiency fully soft-switching single-stage 3-level power amplifier with dual auxiliary networks. The primary-side passive auxiliary network is formed by one inductor and two capacitors to extend soft switching ranges and avoid switching loss. The secondary-side active auxiliary network is constituted of four switches, three capacitors and two inductors which not only removes or maximally reduces otherwise occurring disruptive spikes but also assists zero voltage switching (ZVS) for switches of active auxiliary network. A predictive gate drive method for driving power switches is presented to guarantee ZVS turn-on. The proposed circuit achieves high level of integration without bulky dc link capacitor, and high-efficiency by single-stage conversion and ZVS for all the switches under different operating conditions.

Disclosed is an electronic circuit for controlling a half H bridge, the half split H bridge including first and second MOSFET transistors of different respective types, with sources connected respectively to a supply line and to an electric mass, and with respective drains connected to a load. Moreover, the control circuit includes first and second bipolar transistors of different respective types, with collectors connected to the supply line and to the electric mass, respectively, and with respective bases connected to a control module for controlling the MOSFET transistors, as well as first and second arms mounted parallel relative to one another between the gates of the MOSFET transistors, connected to the emitter of the first bipolar transistor and of the second bipolar transistor, respectively, the first arm including a first diode and a first resistor, and the second arm including a second diode and a second resistor.