A circuit includes a transistor, with a resonant tank coupled between a DC supply node and a first conduction terminal of the transistor. A gate driver generates a gate drive signal for biasing a control terminal of the transistor to cause it to conduct current through the resonant tank. Control circuitry monitors a voltage across the transistor to determine that the transistor is an overvoltage condition if that voltage exceeds a threshold, and monitors a current through the transistor to determine that the transistor is an overcurrent condition if that current exceeds a threshold. If overvoltage is determined, the control circuitry causes the gate driver to pull up the gate drive signal. If overcurrent is determined, the control circuitry causes the gate driver to pull down the gate drive signal. If either overvoltage or overcurrent is present, a pulse width of the gate drive signal is reduced.

A regenerative gate charging circuit includes an inductor coupled to a gate of a FET. An output control circuit is coupled to a timing control circuit and a bridged inductor driver, which is coupled to the inductor. A sense circuit is coupled to the gate and to the timing control circuit, which receives a control signal, generates output control signals in accordance with a first timing profile, and transmits the output control signals to the output control circuit. In accordance with the first timing profile, the output control circuit holds switches or controllable current sources of the bridged inductor driver in an ON state for a first period and holds the switches or controllable current sources in an OFF state for a second period. Gate voltages are sampled during the second period and after the first period. The timing control circuit generates a second timing profile using the sampled voltages.

A circuit for regenerative gate charging includes an inductor coupled to a gate of a FET. An output control circuit is coupled to a timing control circuit and a bridged inductor driver, which is coupled to the inductor. A sense circuit is coupled to the gate and to the timing control circuit, which receives a control signal, generates output control signals in accordance with a first switch timing profile, and transmits the output control signals to the output control circuit. In accordance with the first switch timing profile, the output control circuit holds switches of the bridged inductor driver in an ON state for a first period and holds all of the switches in an OFF state for a second period. Gate voltages are sampled during the second period and after the first period. The timing control circuit generates a second switch timing profile using the sampled voltages.

Described herein are reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies. A resonant clock distribution network comprises a plurality of resonant clock drivers that receive at least one of a plurality of reference clock signals. An energy saving component is coupled with the plurality of resonant clock drivers. The energy saving component provides for lower energy consumption by resonating with unwanted parasitic capacitance of a load capacitance. The energy saving component and the load capacitance (LC) form a series resonant frequency that is significantly greater than a clock frequency of the plurality of resonant clock drivers, so that output clock signal paths are not interfered with and so that effects on skew are minimized.

An auxiliary circuit for outputting a supplying voltage or a detection signal includes a normally-on device and a signal processing circuit. A drain terminal of the normally-on switching device is coupled to a first terminal, a gate terminal of the normally-on switching device is coupled to a second terminal. An input voltage between the first terminal and the second terminal switches between two different levels. The signal processing circuit is configured to output the supplying voltage or the detection signal according to a voltage at a source terminal of the normally-on switching device.

An auxiliary circuit for outputting a supplying voltage or a detection signal includes a normally-on device and a signal processing circuit. A drain terminal of the normally-on switching device is coupled to a first terminal, a gate terminal of the normally-on switching device is coupled to a second terminal. An input voltage between the first terminal and the second terminal switches between two different levels. The signal processing circuit is configured to output the supplying voltage or the detection signal according to a voltage at a source terminal of the normally-on switching device.

A gate-charge harvester includes a harvest capacitor that has a first plate and a second plate. The second plate is coupled to a lower rail and the first plate is coupled to send a voltage towards a regulator. The gate-charge harvester also includes a low-side harvest transistor having a first terminal coupled to a gate of a low-side power transistor and a second terminal coupled to the first plate.

A drive circuit for a power switching transistor includes a first pull-up drive transistor connected in parallel with a second pull-up drive transistor, a first pull-down drive transistor coupled to the first and second pull-up drive transistors in series to drive the power switching transistor. When control signal is at a high level, the first pull-up driver is turned on, and the first pull-down driver is turned off. The second pull-up drive transistor being in turn-on or turn-off state is determined by comparing voltage of the power supply with the threshold value. When voltage of the power supply is lower than the threshold value, the first and second pull-up drive transistor are driven together. When voltage of the power supply is higher than the threshold value, the second pull-up driving transistor is turned on only after the driving output is slightly larger than the Miller plateau voltage.

A circuit includes a transistor, with a resonant tank coupled between a DC supply node and a first conduction terminal of the transistor. A gate driver generates a gate drive signal for biasing a control terminal of the transistor to cause it to conduct current through the resonant tank. Control circuitry monitors a voltage across the transistor to determine that the transistor is an overvoltage condition if that voltage exceeds a threshold, and monitors a current through the transistor to determine that the transistor is an overcurrent condition if that current exceeds a threshold. If overvoltage is determined, the control circuitry causes the gate driver to pull up the gate drive signal. If overcurrent is determined, the control circuitry causes the gate driver to pull down the gate drive signal. If either overvoltage or overcurrent is present, a pulse width of the gate drive signal is reduced.

A device includes a transformer that further includes a primary and a secondary windings. A switch is coupled to the primary winding, and this switch is controlled by the received digital input signal. An oscillator is further formed on the secondary winding where the oscillator oscillates in response to variations of the received input signal. A detector coupled to the oscillator will then detect the oscillations in response to the variations of the received input signal. Thereafter, the detector generates a digital output based on the detected oscillations.