A DC power distribution system has power sources, a DC power distribution bus with DC bus sections. The system has power switching assemblies to couple one of the DC bus sections to another and a system controller. An inverter is connected to one of the power switching assemblies to supply a consumer. The first and second terminals are electrically coupled to first and second bus sections. First and second semiconductor devices between the terminals control current flow and there is a current connection from each terminal to a power switching assembly controller for providing an indication of current. A control signal line is connected between the power switching assembly controller and each semiconductor device provides a signal to the semiconductor devices to control the current flow and an inverter coupler couples each current connection to the inverter. The inverter coupler has a feed from each current connection to the inverter.

A switching half-bridge has two field-effect transistors and a supplementary circuit arranged upstream of a gate terminal of a first field-effect transistor and formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch being connected in parallel with the first circuit branch and having a series resistor and an auxiliary switch connected in series with the series resistor. The half-bridge can be switched from a first switching state to a second switching state, wherein while the auxiliary switch is open, a change in the control voltage causes the first circuit branch to temporarily change the gate-source voltage of the first field-effect transistor from the switch-on level to a second switch-off level greater than a first switch-off level, with the gate-source voltage thereafter returning to the first switch-off level.

Disclosed herein is a circuit including a transistor, with a resonant tank coupled between a DC supply node and a first conduction terminal of the transistor. A gate driver generates a gate drive signal for biasing a control terminal of the transistor to cause it to conduct current through the resonant tank. Control circuitry monitors a voltage across the transistor to determine that the transistor is an overvoltage condition if that voltage exceeds a threshold, and monitors a current through the transistor to determine that the transistor is an overcurrent condition if that current exceeds a threshold. If overvoltage is determined, the control circuitry causes the gate driver to pull up the gate drive signal. If overcurrent is determined, the control circuitry causes the gate driver to pull down the gate drive signal. If either overvoltage or overcurrent is present, a pulse width of the gate drive signal is reduced.

A gate-charge harvester includes a harvest capacitor that has a first plate and a second plate. The second plate is coupled to a lower rail and the first plate is coupled to send a voltage towards a regulator. The gate-charge harvester also includes a low-side harvest transistor having a first terminal coupled to a gate of a low-side power transistor and a second terminal coupled to the first plate.

A system includes an input port having an input voltage, an output port having an output voltage, and a power converter having a switch network with a plurality of power switches and a first resonant tank having a first resonant capacitor and a first resonant inductor, where at least one resonant component within the first resonant capacitor and the first resonant inductor is a switchable component configured to switch between different values. The system further includes a resonant mode selection block configured to adjust a value of the switchable component to maintain a performance of the system, and a controller configured to adjust a switching frequency or a duty cycle of the power converter.

Embodiments described herein are directed to power switching circuits having a saturable inductor. In one embodiment, a power switching circuit includes a power switch assembly operable to be connected to a power source. The power switch assembly includes a plurality of parallel power switches connected to and receiving current from the power source and a saturable inductor electrically coupled in series with the plurality of parallel power switches.

A FET driving circuit includes: inputs into which a DC voltage is inputted; outputs connected to gate and source electrodes of a FET; a switch; a capacitance connected across the switch; and an LC resonance circuit connected in series with the switch across the inputs. A voltage generated across the switch during switching is outputted to drive the FET. The LC resonance circuit has a first connector connected to one input and a second connector connected to the switch, and is configured with a path including an inductance and a path including an inductance and a capacitance. An impedance between the first and second connectors has two resonant frequencies. The impedance has a local maximum at the lower resonant frequency, which is higher than a switching frequency, and a local minimum at the higher resonant frequency, which is around double the switching frequency.

Described herein are reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies. A resonant clock distribution network comprises a plurality of resonant clock drivers that receive at least one of a plurality of reference clock signals. An energy saving component is coupled with the plurality of resonant clock drivers. The energy saving component provides for lower energy consumption by resonating with unwanted parasitic capacitance of a load capacitance. The energy saving component and the load capacitance (LC) form a series resonant frequency that is significantly greater than a clock frequency of the plurality of resonant clock drivers, so that output clock signal paths are not interfered with and so that effects on skew are minimized.

A gate drive circuit including a drive-on element that applies an on-state voltage to a gate of a drive target semiconductor element and a drive-off element that applies an off-state voltage to the gate is such that a recovery switch, a reactor, and a capacitor are connected in series between output terminals of the gate drive circuit as a recovery circuit that can recover a charge accumulated in input capacitance of the drive target semiconductor element when turning on, and the drive-on element, the drive-off element, and the recovery switch are controlled by a control circuit, whereby power consumption of the gate drive circuit is reduced.

A semiconductor device includes first semiconductor elements, a control terminal, a first conductive member, and first circuit components. The first semiconductor elements are connected in parallel, and a switching operation of each first semiconductor element is controlled according to a first drive signal inputted to a third electrode of each first semiconductor element. The first conductive member is electrically connected to the control terminal to which the first drive signal is inputted, and is electrically interposed between the third electrodes. The first conductive member includes connecting members and a portion of a signal wiring section. Each of the first circuit components increases an impedance in a first frequency band. The first frequency band includes a resonance frequency of a resonance circuit that is formed by including a parasitic inductance of the first conductive member. The third electrodes of the first semiconductor elements are electrically connected to each other via at least one of the first circuit components.