A reference voltage generator comprises a comparator, a digital-to-analog converter (DAC) and a switched capacitor accumulator. The comparator receives a reference voltage input, a feedback input, and a control signal. The DAC is coupled to an output of the comparator, and the switched capacitor accumulator is coupled to an output of the DAC. In some implementations, a digital filter is coupled between the output of the comparator and the input of the DAC. The switched capacitor accumulator can be coupled to a buffer that outputs the feedback input and a reference voltage for an analog-to-digital converter (ADC). In some implementations, the feedback loop includes N one-bit DACs coupled to the output of the comparator and N switched capacitor accumulators, each of which is coupled to a unique one-bit DAC.

A sensing device includes at least one particle sensor that responds to sensed subatomic particles. At least one drive-sense circuit is coupled to the particle sensor, wherein the at least one drive-sense circuit includes: a first conversion circuit configured to convert a receive signal component of a sensor signal corresponding to the at least one particle sensor into the sensed signal, wherein the sensed signal indicates a change in an electrical characteristic associated with the at least one particle sensor; and a second conversion circuit configured to generate, based on the sensed signal, a drive signal component of the sensor signal corresponding to the at least one particle sensor.

In modern networks, RRU and BBU equipment of an access point site typically handles traffic from a single sector. An RRU-BBU pair process that traffic (often limited to a single spectrum from a single sector) according to implemented capabilities and other equipment located further upstream perform functions that rely on information from multiple sectors. An integrated device (e.g., white box) can integrate the functionality of multiple RRU (or NR in 5G) and the functionality of multiple BBU (or DU/CU splits in 5G), which can reduce implementation footprint, costs, and can provide related services more efficiently without going upstream.

A method for cartesian (IQ) to polar phase conversion includes: converting a first input value into a first absolute value, and a second input value into a second absolute value; converting the first absolute value into a first logarithmic value by calculating a scaled logarithmic value of the first absolute value, and the second absolute value into a second logarithmic value by calculating a scaled logarithmic value of the second absolute value; subtracting the first logarithmic value from the second logarithmic value, to provide a subtract value; and selecting a phase value from a plurality of phase values stored in a storage unit. Each of the plurality of phase values corresponds to a respective index value, and the phase value is selected taking the subtract value as the index value.

The present invention provides the signals received from different antennas (100) in a certain frequency range with micro-miniature input connectors (101) on a printed circuit, amplified and filtered with the help of RF frontend, and then passed to digital domain (109) with analog-digital converter (107) and further then it performs the switching of the signal by transmitting the signal to the FPGA (110). The signal switched in the FPGA (110) is sent to the related digital-analog converter (107) to be routed to the related output port. The digital-analog converter (112), on the other hand, sends the signal analog to one of the micro-miniature output connectors (114) on the output, and performs the reception of the signal from that output port. In the application of the present invention, a structure with a frequency band of 4 MHz - 50 MHz (HF band) and 32 inputs and 32 outputs has been implemented specifically.

A system and method are described herein for configuring an audio distribution system, comprising a Redis server, the Redis server adapted to store Redis data to be used in configuring the audio distribution system; a plurality of audio devices, the plurality of audio devices and Redis server interconnected to form the audio distribution system, wherein each of the plurality of audio devices comprises—at least one processor; an electronic communications interface operatively connected to the at least one processor and adapted to receive data from a user and transfer the data to the at least one processor; and a memory operatively connected with the at least one processor, wherein the memory stores computer-executable instructions that, when executed by the at least one processor, causes the at least one processor in a first audio device to execute a method for configuring the audio distribution system that comprises: establishing communications using the electronic communications interface between the user and the at least one processor of the first audio device, such that data input by the user is received by the at least one processor of the first audio device; establishing communications to each of the remaining plurality of audio devices and Redis server in the audio distribution system; obtaining information from each of the remaining plurality of audio devices with which communications have been established, such information including one or more of an audio device name, part number, serial number, internet protocol address number, and physical location; receiving configuration information from the user that pertains to a specific audio device of the plurality of audio devices in the audio distribution system that, when installed on a specific audio device, causes the specific audio device to operate in a known manner; and copying that configuration information to others of the same specific type of audio device in the audio distribution system.

A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.

Systems, methods, and devices for monitoring operation of industrial equipment are disclosed. In one embodiment, a monitoring system is provided that includes a passive backplane and one more functional circuits that can couple to the backplane. Each of the functional circuits that are coupled to the backplane can have access to all data that is delivered to the backplane. Therefore, resources (e.g., computing power, or other functionality) from each functional circuits can be shared by all active functional circuits that are coupled to the backplane. Because resources from each of the functional circuits can be shared, and because the functional circuits can be detachably coupled to the backplane, performance of the monitoring systems can be tailored to specific applications. For example, processing power can be increased by coupling additional processing circuits to the backplane.

A reference voltage generator comprises a comparator, a digital-to-analog converter (DAC) and a switched capacitor accumulator. The comparator receives a reference voltage input, a feedback input, and a control signal. The DAC is coupled to an output of the comparator, and the switched capacitor accumulator is coupled to an output of the DAC. In some implementations, a digital filter is coupled between the output of the comparator and the input of the DAC. The switched capacitor accumulator can be coupled to a buffer that outputs the feedback input and a reference voltage for an analog-to-digital converter (ADC). In some implementations, the feedback loop includes N one-bit DACs coupled to the output of the comparator and N switched capacitor accumulators, each of which is coupled to a unique one-bit DAC.

A circuit arrangement may include an analog-to-digital-converter (ADC) configured to convert an analog signal into a digitized signal having an ADC frequency, a decimation circuit configured to provide a first signal having a sampling frequency based on the digitized radio signal having the ADC frequency. The sampling frequency is smaller than the ADC frequency. The circuit arrangement may further include a timer circuit providing a second signal having a timer frequency and a timing control signal to control the timing of the decimation circuit, and a difference determination circuit configured to determine a phase difference between the second signal and the first signal.