Patent classifications
H03M1/66
Digital-to-analog converter, transmitter, base station, mobile device and method for a digital-to-analog converter
A Digital-to-Analog Converter (DAC) is provided. The DAC includes a code converter circuit configured to sequentially receive first digital control codes for controlling N digital-to-analog converter cells. N is an integer greater than one. The code converter circuit is further configured to convert the first digital control codes to second digital control codes. Additionally, the DAC includes a bit-shifter circuit configured to receive shift codes for the second digital control codes. The shift codes are obtained using dynamic element matching and indicate a respective circular shift by r.sub.i bit positions for the i-th second digital control code, wherein r.sub.i is an integer smaller than N?1. The bit-shifter circuit is further configured to generate third digital control codes by circularly shifting the second digital codes based on the shift codes. In addition, the DAC includes a cell activation circuit configured to selectively activate one or more of the N digital-to-analog converter cells based on the third digital control codes.
Pulse width signal overlap compensation techniques
A pulse signal compensation circuit of a pulse generator can include a pulse measurement circuit and a compensation generator circuit. The pulse measurement circuit can be configured to receive a plurality of pulse signals and to generate an average duty cycle or pulse overlap signal proportional to the duty cycle or pulse overlap of the plurality of pulses. The compensation generator circuit can be configured to receive the average duty cycle or pulse overlap signal and generate a duty cycle or pulse overlap compensation signal based on the average duty cycle or pulse overlap signal. The compensation signal can be utilized to adjust the duty cycle, amount of positive or negative pulse width overlap, and or the like of the plurality of pulse signals.
Circuit structure and related method to indicate voltage polarity via comparator
Embodiments of the disclosure provide a circuit structure and method to indicate a differential voltage polarity using a comparator. The circuit structure includes a digital-to-analog converter (DAC) coupled to a positive differential voltage, a negative differential voltage, and a reference voltage. The DAC generates an output based on the positive differential voltage, the negative differential voltage, and the reference voltage. A comparator has a first input coupled to one of the DAC output and the positive differential voltage, and a second input coupled to one of the reference voltage and the negative differential voltage. A multiplexer array is coupled to the comparator and transmits one of: the positive differential voltage and the negative differential voltage to the comparator, causing the comparator to output a differential voltage polarity; and the DAC output and the reference voltage, causing the comparator to output an approximated bit for the DAC output.
Methods and devices for adaptive voltage steadying
A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
Methods and devices for adaptive voltage steadying
A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
Local oscillator driver circuitry with second harmonic rejection
An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.
Local oscillator driver circuitry with second harmonic rejection
An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.
Digital-to-analog converter with hybrid coupler
The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.
WAVEFORM DATA TRANSMISSION
In a waveform data transmission method, control and measurement waveform data of a first signal waveform for control and measurement of a quantum chip is generated by control and measurement software of a qubit control and measurement system. The control and measurement waveform data is compressed, by the control and measurement software, to obtain compressed control and measurement waveform data. The compressed control and measurement waveform data is transmitted to an electronics system of the qubit control and measurement system. The compressed control and measurement waveform data is decompressed, by processing circuitry of the electronics system, to obtain recovered control and measurement waveform data. The first signal waveform is transmitted to the quantum chip according to the recovered control and measurement waveform data.
WAVEFORM DATA TRANSMISSION
In a waveform data transmission method, control and measurement waveform data of a first signal waveform for control and measurement of a quantum chip is generated by control and measurement software of a qubit control and measurement system. The control and measurement waveform data is compressed, by the control and measurement software, to obtain compressed control and measurement waveform data. The compressed control and measurement waveform data is transmitted to an electronics system of the qubit control and measurement system. The compressed control and measurement waveform data is decompressed, by processing circuitry of the electronics system, to obtain recovered control and measurement waveform data. The first signal waveform is transmitted to the quantum chip according to the recovered control and measurement waveform data.