A system and method for low-power digital signal processing, for example, comprising adjusting a digital representation of an input signal.

Methods and systems are provided for enhanced digital-to-analog conversions. A segmentation-based digital-to-analog converter (DAC) may be configured for applying digital-to-analog conversions to N-bit inputs. The segmentation-based DAC may comprise a plurality of DAC elements, with each DAC element being operable to apply digital-to-analog conversion based on a single bit, and an encoder operable to generate an x-bit output. The number of DAC elements may be different than number of bits (N) in inputs to the DAC. One or more bits of the N-bit input may be applied to the encoder to generate the x-bit output, with each bit in the x-bit output being applied to a corresponding one of the plurality of DAC elements. Remaining one or more bits of the N-bit input, if any, may be applied directly to a corresponding one or more of the plurality of DAC elements.

Methods and systems are provided for enhanced digital-to-analog conversions. A segmentation-based digital-to-analog converter (DAC) may be configured for applying digital-to-analog conversions to N-bit inputs. The segmentation-based DAC may comprise a plurality of DAC elements, with each DAC element being operable to apply digital-to-analog conversion based on a single bit, and an encoder operable to generate an x-bit output. The number of DAC elements may be different than number of bits (N) in inputs to the DAC. One or more bits of the N-bit input may be applied to the encoder to generate the x-bit output, with each bit in the x-bit output being applied to a corresponding one of the plurality of DAC elements. Remaining one or more bits of the N-bit input, if any, may be applied directly to a corresponding one or more of the plurality of DAC elements.

Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. are provided here. An apparatus is provided which comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. are provided here. An apparatus is provided which comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive nonlinear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank.

Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.

Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.

A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

A wireless cellular telephone with an audio codec for converting digital audio signals to analog audio signals. The audio codec comprises two digital audio bus interfaces for coupling to respective digital audio buses, and a digital-only signal path between the two digital audio bus interfaces, such that no analog processing of the audio signals occurs in the digital-only signal path.