An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

A time-interleaved digital-to-analog converter (DAC) includes a digital processing circuit, a time-domain dynamic element matching (TDEM) circuit, a plurality of DACs, and a combining circuit. The digital processing circuit generates data sequences according to the digital signal. The data sequences include a first data sequence and a second data sequence. The TDEM circuit swaps a portion of the first data sequence with a portion of the second data sequence to generate a first adjusted data sequence and a second adjusted data sequence. The DACs include a first DAC and a second DAC. The first DAC has a first DAC cell that operates in response to the first adjusted data sequence. The second DAC has a second DAC cell that operates in response to the second adjusted data sequence. The combining circuit generates the analog signal by combining analog outputs of the DACs.

A sensing circuit includes a signal source circuit and a transient circuit. The signal source circuit provides a signal to the sensor via a conductor. When the sensor is exposed to a condition and is receiving the signal, an electrical characteristic of the sensor affects the signal, which is interpreted by the signal source circuit. When the sensing circuit is in a noisy environment, transient noise couples with the signal to produce a noisy signal. The transient circuit compares the noisy signal with a representation of the noisy signal. When the noisy signal compares unfavorably with the representation of the noisy signal, the transient circuit supplies a compensation signal to the conductor. The level of the compensation signal corresponds to a level at which the noisy signal compares unfavorably with the representation of the noisy signal.

A sensing circuit includes a signal source circuit and a transient circuit. The signal source circuit provides a signal to the sensor via a conductor. When the sensor is exposed to a condition and is receiving the signal, an electrical characteristic of the sensor affects the signal, which is interpreted by the signal source circuit. When the sensing circuit is in a noisy environment, transient noise couples with the signal to produce a noisy signal. The transient circuit compares the noisy signal with a representation of the noisy signal. When the noisy signal compares unfavorably with the representation of the noisy signal, the transient circuit supplies a compensation signal to the conductor. The level of the compensation signal corresponds to a level at which the noisy signal compares unfavorably with the representation of the noisy signal.

Certain aspects of the present disclosure provide apparatus and techniques for digital-to-analog conversion. One example apparatus generally includes a first digital-to-analog converter (DAC) having an input coupled to a digital input node of the apparatus, a second DAC, a digital processor coupled between the digital input node and an input of the second DAC, and a combiner coupled to the first DAC and the second DAC.

A digital-to-analog converter comprises a plurality of first digital-to-analog converter cells configured to generate a first analog signal based on first digital data, wherein the first digital-to-analog converter cells of the plurality of first digital-to-analog converter cells are coupled to a first output node for coupling to a first load. Further, the digital-to-analog converter comprises a plurality of second digital-to-analog converter cells configured to generate one or more second analog signals based on second digital data, wherein the second digital-to-analog converter cells of the plurality of second digital-to-analog converter cells are coupled to one or more second output nodes, and wherein the plurality of first digital-to-analog converter cells and the plurality of second digital-to-analog converter cells are coupled to a power supply node for coupling to a mutual power supply.

A digital-to-analog converter comprises a plurality of first digital-to-analog converter cells configured to generate a first analog signal based on first digital data, wherein the first digital-to-analog converter cells of the plurality of first digital-to-analog converter cells are coupled to a first output node for coupling to a first load. Further, the digital-to-analog converter comprises a plurality of second digital-to-analog converter cells configured to generate one or more second analog signals based on second digital data, wherein the second digital-to-analog converter cells of the plurality of second digital-to-analog converter cells are coupled to one or more second output nodes, and wherein the plurality of first digital-to-analog converter cells and the plurality of second digital-to-analog converter cells are coupled to a power supply node for coupling to a mutual power supply.

A DC-shifting predriver has an input port configured for coupling to a serial data stream, an inverting output amplifier having an feedback node and an output port configured for coupling to a transistor at the input to a high-speed DAC or TX driver, and a capacitor AC-coupled between the input port and the feedback node. A weak feedback inverter having structure similar to, but less drive strength than the inverting output amplifier is coupled between the output port and the feedback node to act as a positive feedback latch. The predriver provides a DC shift up to 3V with high reliability and minimal intersymbol interference for data rates from 10 GS/s to 28 GS/s or higher. The predriver may provide multiple input ports implemented as a predriver array in an M-bit system, and the output amplifier may consist of N stages.

A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.

A successive approximation register (SAR) analog-to-digital converter (ADC) includes a first digital-to-analog converter (DAC) coupled to receive a first input voltage to generate a first output voltage; a second DAC coupled to receive a second input voltage to generate a second output voltage; a comparator having a positive input node coupled to receive the first output voltage of the first DAC, and a negative input node coupled to receive the second output voltage of the second DAC; a SAR controller that controls switching of the first DAC and the second DAC according to a comparison output of the comparator, thereby generating an output code; a first calibration circuit coupled between the positive input node of the comparator and a ground voltage; and a second calibration circuit coupled between the negative input node of the comparator and the ground voltage.