Methods and apparatus associated with storing data in high or low energy zones are described. Example apparatus include a data storage system (DSS) that protects a message using an erasure code (EC). A location in the DSS may have an energy efficiency rating or a latency. Example apparatus include circuits that produce EC encoded data that has a likelihood of use, that select a location to store the EC encoded data in the DSS based on the energy efficiency rating, the latency, or the likelihood of use, that store the EC encoded data in the location, and that compute an order of retrieval for EC encoded data stored in the location. The order of retrieval may be based on the energy efficiency rating or the latency. The EC encoded data may also have a priority based on the number of erasures for which the EC corrects.

The present technology relates to a data processing apparatus and a data processing method that are able to secure good communication quality in data transmission using an LDPC code. One symbol is mapped to one of 16 signal points prescribed in 16APSK, with code bits of four bits of an LDPC code having a code length of 16200 bits and a code rate of 7/15 as one symbol. 16 signal points prescribed in 16APSK are four signal points on an inner circle and 12 signal points on an outer circle, and a radius ratio of the inner circle and the outer circle is 5.25. The present technology may be applied to, for example, a case of performing data transmission using an LDPC code.

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.

For low complexity error correction, a decoder modifies each reliability metric of an input data stream with a random perturbation value. The reliability metric comprises a weighted sum of a channel measurement for the input data stream and parity check results for the input data stream. In addition, the decoder may generate an output data stream as a function of the reliability metrics.

A cluster receives a request to store an object using replication or erasure coding. The cluster writes the object using erasure coding. A manifest is written that includes an indication of erasure coding and a unique identifier for each segment. The cluster returns a unique identifier of the manifest. The cluster receives a request from a client that includes a unique identifier. The cluster determines whether the object has been stored using replication or erasure coding. If using erasure coding, the method reads a manifest. The method identifies segments within the cluster using unique segment identifiers of the manifest. Using these unique segment identifiers, the method reconstructs the object. A persistent storage area of another disk is scanned to find a unique identifier of a failed disk. If using erasure coding, a missing segment previously stored on the disk is identified. The method locates other segments. Missing segments are regenerated.

A coding and modulation apparatus and method are presented. The apparatus comprises an encoder that encodes input data into cell words, and a modulator that modulates said cell words into constellation values of a non-uniform constellation. The modulator is configured to use, based on the total number M of constellation points of the constellation and the signal-to-noise ratio SNR in dB, a non-uniform constellation from a group of constellations comprising one or more of predetermined constellations defined by the constellation position vector w.sub.0 . . . b−1, wherein b=M/4.

Systems, methods, and instrumentalities are disclosed for priority-based channel coding for control information. A wireless transmit/receive unit (WTRU) may sort control information associated with a first control information type into a first control information group and the control information associated with a second control information type into a second control information group, for example, based on respective priorities associated with the first and second control information types. The WTRU may group one or more bits of the first control information group into a first bit level control information group and a second bit level control information group based on priority. The WTRU may selectively apply a cyclic redundancy check (CRC) to the first control information group, the second control information group, the first bit level control information group, and/or the second bit level control information group.

A code bit of an LDPC code in which a code length is 16200 bits and an encoding rate is 8/15 is interchanged with a symbol bit of a symbol corresponding to any of 8 signal points defined by 8PSK. When 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a (#i+1)-th bit from a most significant bit of the 3 bits of code bits is set to a bit b#i, a (#i+1)-th bit from a most significant bit of 3 bits of symbol bits of the one symbol is set to a bit y#i, and a bit b0 is interchanged with a bit y1, a bit b1 is interchanged with a bit y0, and a bit b2 is interchanged with a bit y2.

Techniques described and suggested herein include systems and methods for improving data performance characteristics for data archives stored on data storage systems using redundancy coding techniques, without necessitating expansion of the implementing data storage system. For example, redundancy coded shards, which may include identity shards that contain unencoded original data of archives, may be configured such that a variable number of the shards can be leveraged to meet performance requirements for retrieval requests associated with the archives stored and/or encoded therein. Multiple shards may be assigned to devices in an existing infrastructure to improve performance characteristics without changing redundancy code parameters. Implementing systems may monitor random access rates, capabilities, and burdens, so as to adaptively account for changes to some or all of the monitored parameters.