[Problem to be Solved] Optimizing a route of time synchronization in a network including apparatuses with different types of precision classes.

[Solution to the Problem] A time transmission system includes BC nodes 200 with different types of apparatus performances, and multiple routes of PTP packets from GM nodes 101 and 102 to a BC node 220 via the BC node 200 are present. Each BC node 200 located upstream on a route performs notification of performance information indicating its apparatus performance to the BC node 200 located downstream with respect thereto. The BC node 220 includes a determination index calculation unit 11 that calculates a determination index for each route by referencing the performance information notified from the BC nodes 200 located upstream on each route, and a route selection unit 12 that selects a route for transmitting and receiving PTP packets from multiple routes of PTP packets to the BC node 220, based on the calculated determination index for each route.

A method and system that provides for execution of a first calibration sequence, such as upon initialization of a system, to establish an operation value, which utilizes an algorithm intended to be exhaustive, and executing a second calibration sequence from time to time, to measure drift in the parameter, and to update the operation value in response to the measured drift. The second calibration sequence utilizes less resources of the communication channel than does the first calibration sequence. In one embodiment, the first calibration sequence for measurement and convergence on the operation value utilizes long calibration patterns, such as codes that are greater than 30 bytes, or pseudorandom bit sequences having lengths of 2.sup.N−1 bits, where N is equal to or greater than 7, while the second calibration sequence utilizes short calibration patterns, such as fixed codes less than 16 bytes, and for example as short as 2 bytes long.

A method is performed by a data transmitting computing resource operating in a first clock domain of a computing system to transfer data to a data receiving computing resource operating in a second clock domain of the computing system different from the first clock domain. The method includes placing data on a parallel data channel including a plurality of data lines connecting the data transmitting computing resource and the data receiving computing resource; waiting a predetermined amount of time after the placing of the data on the parallel data channel, the predetermined amount of time based on different propagation times of the plurality of data lines; and, after waiting the predetermined amount of time, notifying the data receiving computing resource that the data placed on the parallel data channel are valid.

Methods and systems are provided for using decision feedback phase error correction during signal processing. When an input signal comprises a plurality of sub-carriers, each of the plurality of sub-carriers may be processed separately, for each one of the plurality sub-carriers error related information may be determined separately, based on the processing of that sub-carrier. Subsequent processing of at least one of the plurality of sub-carriers may then be adjusted based on determined error related information corresponding to one or more sub-carriers. In this regard, the subsequent processing of the at least one sub-carrier may be adjusted based on determined error related information for that sub-carrier, based on determined error related information for at least one other sub-carrier, or based on determined error related information corresponding to all of the sub-carriers. The error related information may comprise phase error related information.

The present invention provides a receiver including a sampling circuit, a data sampling point selection circuit and a determination circuit. The sampling circuit is configured to use a clock signal to sample an input signal to generate a sampled signal, wherein a frequency of the clock signal is greater than a frequency of the input signal. The data sampling point selection circuit is configured to filter start point data to generate a filtered start point data, and to generate a data sampling point by adding an offset to the filtered start point data, wherein the start point data corresponds to a time point that a sampled value of sampled signal starts to change. The determination circuit is configured to refer to a sampled value corresponding to the data sampling point in the sampled signal to determine a logical value of a digital output signal corresponding to the input signal.

A method and system provides for execution of calibration cycles from time to time during normal operation of the communication channel. A calibration cycle includes de-coupling the normal data source from the transmitter and supplying a calibration pattern in its place. The calibration pattern is received from the communication link using the receiver on the second component. A calibrated value of a parameter of the communication channel is determined in response to the received calibration pattern. The steps involved in calibration cycles can be reordered to account for utilization patterns of the communication channel. For bidirectional links, calibration cycles are executed which include the step of storing received calibration patterns on the second component, and retransmitting such calibration patterns back to the first component for use in adjusting parameters of the channel at first component.

A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.

In an example, there is disclosed an apparatus, having: a first network interface, having a first clock and a local communication driver to communicatively couple the first network interface to a second network interface having a second clock; and one or more logic elements, including at least one hardware logic element, providing a synchronization engine to: send a first plurality of data words from the first wireless interface to the second wireless interface via the local communication driver; receive back from the second wireless interface a second plurality of data words; assign a plurality of error rates to the data words of the second plurality of data words, the plurality of error rates indicating match or mismatch; identify a range of least error values within the plurality of error rates; and select an agreed baud rate from within the range.

A method includes receiving an optical signal through an optical link and determining a receiving power for the optical link. The method further includes comparing the receiving power for the optical link to a first receiving power threshold and transitioning a clock and data recovery circuit form a normal mode to a holdover mode when the receiving power is less than the first receiving power threshold. The clock and data recovery circuit, when operating in the holdover mode, configured to hold a recovered clock to a known-good clock frequency. When the receiving power for the optical link is greater than a second receiving power threshold, the method initiates a transition of the clock and data recovery circuit from the holdover mode to the normal mode and reacquires synchronization between the recovered clock and a current rate of the incoming data stream using the known-good clock frequency.

A method for determining an angle of arrival (AOA) of a received signal is disclosed, comprising: generating a baseband information signal by mixing a received signal with a local oscillator (LO) signal, the received signal being an in-phase signal and quadrature signal uncorrelated with each other and derived from different input data sets; obtaining baseband signal samples of the baseband information signal having an in-phase signal sample and a quadrature signal sample; determining a transmitter phase offset based on an estimated correlation between the in-phase signal samples and the quadrature signal samples; performing a plurality of phase measurements using a plurality of antennas to obtain a plurality of phase measurements; correcting the plurality of phase measurements based on the transmitter phase offset to produce a plurality of corrected phase measurement; and calculating an AOA of the received signal based on the difference between the plurality of corrected phase measurements.