Disclosed are an Ethernet interconnection circuit and apparatus. A physical interface exchanger of the circuit has a first physical interface, a second physical interface and a third physical interface, wherein a first board-level processor realizes communication between the first board-level processor and an external Ethernet by means of the first physical interface, the third physical interface, and a network interface connected to the third physical interface; a second board-level processor realizes communication between the second board-level processor and the external Ethernet by means of the second physical interface, the third physical interface, and the network interface connected to the third physical interface; and the first-board-level processor and the second-board-level processor realize communication between the first board-level processor and the second-board-level processor by means of the first physical interface and the second physical interface.

Disclosed are an Ethernet interconnection circuit and apparatus. A physical interface exchanger of the circuit has a first physical interface, a second physical interface and a third physical interface, wherein a first board-level processor realizes communication between the first board-level processor and an external Ethernet by means of the first physical interface, the third physical interface, and a network interface connected to the third physical interface; a second board-level processor realizes communication between the second board-level processor and the external Ethernet by means of the second physical interface, the third physical interface, and the network interface connected to the third physical interface; and the first-board-level processor and the second-board-level processor realize communication between the first board-level processor and the second-board-level processor by means of the first physical interface and the second physical interface.

A module unit for connecting a data bus participant to a local bus. The module unit has a first input interface and a first output interface which can be connected to the local bus, a first data connection interface which can be connected to the data bus participant, and a first switch which is adapted so as to assume a first or a second switch state depending on a control input from the data bus participant, connect the first input interface to the first output interface in the first switch state, and connect the first data connection interface to the first output interface in the second switch state.

A module unit for connecting a data bus participant to a local bus. The module unit has a first input interface and a first output interface which can be connected to the local bus, a first data connection interface which can be connected to the data bus participant, and a first switch which is adapted so as to assume a first or a second switch state depending on a control input from the data bus participant, connect the first input interface to the first output interface in the first switch state, and connect the first data connection interface to the first output interface in the second switch state.

An apparatus, method, and system disclosed herein are directed to a user equipment (UE) capable of switching an uplink modulation mode to a higher order modulation mode based on communication, or link, conditions and a condition associated with the UE. The UE, in response to receiving a request to change a current uplink modulation mode to a new modulation mode having a higher order modulation, may determine whether a current condition associated with the UE meets a predetermined condition. In response to determining that the current condition, including a current transmit power level and a current battery power level, meets the predetermined condition, the UE may generate a confirmation indicating that the current condition meets the predetermined condition, send the confirmation, and change the uplink modulation mode to the new modulation mode.

Systems and techniques that facilitate smart CAN termination are provided. In various embodiments, a system can comprise a sensor component that can measure an impedance of a controller area network (CAN) bus. In various aspects, the system can further comprise a termination component that can convert at least one node of the CAN bus from a non-terminating state to a terminating state, based on the impedance.

Systems and techniques that facilitate smart CAN termination are provided. In various embodiments, a system can comprise a sensor component that can measure an impedance of a controller area network (CAN) bus. In various aspects, the system can further comprise a termination component that can convert at least one node of the CAN bus from a non-terminating state to a terminating state, based on the impedance.

VLSI layouts of generalized multi-stage and pyramid networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links with spacial locality exploitation. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. Furthermore the shuffle exchange links are employed between different sub-integrated circuit blocks so that spatially nearer sub-integrated circuit blocks are connected with shorter links compared to the shuffle exchange links between spatially farther sub-integrated circuit blocks. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation. The VLSI layouts with spacial locality exploitation presented are applicable to generalized multi-stage and pyramid networks, generalized folded multi-stage and pyramid networks, generalized butterfly fat tree and pyramid networks, generalized multi-link multi-stage and pyramid networks, generalized folded multi-link multi-stage and pyramid networks, generalized multi-link butterfly fat tree and pyramid networks, generalized hypercube networks, and generalized cube connected cycles networks for speedup of s≥1. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.

VLSI layouts of generalized multi-stage and pyramid networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links with spacial locality exploitation. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. Furthermore the shuffle exchange links are employed between different sub-integrated circuit blocks so that spatially nearer sub-integrated circuit blocks are connected with shorter links compared to the shuffle exchange links between spatially farther sub-integrated circuit blocks. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation. The VLSI layouts with spacial locality exploitation presented are applicable to generalized multi-stage and pyramid networks, generalized folded multi-stage and pyramid networks, generalized butterfly fat tree and pyramid networks, generalized multi-link multi-stage and pyramid networks, generalized folded multi-link multi-stage and pyramid networks, generalized multi-link butterfly fat tree and pyramid networks, generalized hypercube networks, and generalized cube connected cycles networks for speedup of s≥1. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.

A method of communicating and securing data on a network with an air-gap device that includes switching of a first air-gap such that a second air-gap is generated between a second port and a first communication circuit to one or more devices, and such that a second operable connection is generated between a first communication circuit to the one or more devices and a third port. The air gap-device includes a first interface comprising a first port, the first interface being part of the first communication circuit to the one or more devices a second interface comprising the second port; a third interface comprising the third port; and a physical relay array block operably coupled to and corresponding to the first, second and third interfaces, with the physical relay array block configured for physical switching between a first and second configuration that generates the first and second switching.