A method during a first cycle includes receiving, at a first port of a device, a plurality of network packets. The method may include storing, by the device, at least some portion of a first packet of the plurality of network packets at a first address within a first record bank and storing, by the device and concurrent with storing the at least some portion of the first packet from the first address, at least some portion of a second packet of the plurality of network packets at a second address within a second record bank, different than the first record bank. The method may further include storing, by the device, the first address within the first record bank and the second address within the second record bank in the first link stash associated with the first record bank and updating, by the device, a tail pointer to reference the second address.

In one embodiment a queue of drivers for a particular area is maintained, wherein the queue specifies an order in which drivers are selected for transportation requests from the particular area. A driver is selected from the queue for a first transportation request from the particular area. A placement of the driver within the queue of drivers is determined based on at least one characteristic of the first transportation request. An indication of the placement of the driver within the queue of drivers is communicated to a computing device associated with the driver.

In one embodiment a queue of drivers for a particular area is maintained, wherein the queue specifies an order in which drivers are selected for transportation requests from the particular area. A driver is selected from the queue for a first transportation request from the particular area. A placement of the driver within the queue of drivers is determined based on at least one characteristic of the first transportation request. An indication of the placement of the driver within the queue of drivers is communicated to a computing device associated with the driver.

A method of utilizing the same hardware network interface card (NIC) in a gateway of a datacenter to communicate datacenter tenant packet traffic and packet traffic for a set of applications that execute in the user space of the gateway and utilize a network stack in the kernel space of the gateway. The method sends and receives packets for the datacenter tenant packet traffic through a packet datapath in the user space. The method sends incoming packets from the NIC to the set of applications through the datapath in the user space, a user-kernel transport driver connecting the kernel network stack to the datapath in the user space, and the kernel network stack. The method receives outgoing packets at the NIC from the set of applications through the kernel network stack, the user-kernel transport driver, and the data path in the user space.

A memory management method includes: determining that available storage space of a first memory in a network device is less than a first threshold, where the first threshold is greater than 0 and the first memory stores a first packet queue; and deleting at least one packet at the tail of the first packet queue from the first memory based on the available storage space of the first memory being less than the first threshold. When the available storage space of the first memory is less than the first threshold, a packet queue, namely, the first packet queue, is selected and a packet at the tail of the packet queue is deleted from the first memory.

A memory management method includes: determining that available storage space of a first memory in a network device is less than a first threshold, where the first threshold is greater than 0 and the first memory stores a first packet queue; and deleting at least one packet at the tail of the first packet queue from the first memory based on the available storage space of the first memory being less than the first threshold. When the available storage space of the first memory is less than the first threshold, a packet queue, namely, the first packet queue, is selected and a packet at the tail of the packet queue is deleted from the first memory.

A system that has a plurality of controllers of a vehicle configured to execute functions of the vehicle as well as a gateway of the vehicle configured to secure communications between the plurality of controllers and resources of the controllers. To secure the communication, the gateway can be configured to generate links between the controllers and host devices having the resources according to a stored group of approved devices as well as establish, via the links, secured channels for communication between the controllers and the host devices. The system can also include a caching buffer, configured to hold data to be stored to and retrieved from data storage nodes of a distributed data storage system of the vehicle. The distributed data storage system can be configured to store data used by operations performed by the controllers and the gateway.

A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.

A system for synchronizing a local audio processing clock rate of a digital signal processor (DSP) to an audio clock rate of a network to which the DSP is connected. The system includes an adjustable clock synthesizer that is configured to establish the local audio processing clock rate of the DSP. The DSP is configured to generate events that are associated with the local audio processing clock rate of the DSP. The DSP is further configured to monitor the generated events over time and based on the monitored events cause the adjustable clock synthesizer to adjust the local audio processing clock rate of the DSP to better match the network audio clock rate.

A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.