Examples relate to extracting data from network communications. In one example, a programmable hardware processor may: receive a first set of network packets; store each network packet included in the first set in a first storage device; identify, from each network packet included in a subset of the first set of network packets, data included in the network packet, the data meeting at least one condition defined by first programmable logic of the programmable hardware processor; and for each network packet included in the subset: extract, from the network packet, data of interest; and store, in a second storage device, i) the extracted data of interest, and ii) an identifier associated with the network packet.

A STP n-node VLT system includes a first VLT device with a first virtual port, and a second VLT device with a LAG port, a non-LAG port, and a second virtual port coupled to the first virtual port. A STP engine designates the first VLT device as a root bridge and, in response, designates the first virtual port a designated port and the second virtual port a root port. The STP engine then designates a networking device coupled to the LAG port as the root bridge based on it having a higher priority than the first VLT device. Then STP engine then determines that a non-LAG link between the networking device and the second VLT device has caused the redesignation of the second virtual port as an alternate port and the non-LAG port as a root port, and swaps the designations of the second virtual port and the non-LAG port.

A communication apparatus capable of efficiently creating transmission packets even when a free space of a storage unit storing transmission packet headers is insufficient includes a first storage unit to store a header of a transmission packet when the transmission packet is created in a first processing procedure, a first creation unit to create the transmission packet in the first processing procedure using the first storage unit, a second storage unit to store the transmission packet header when the transmission packet is created in a second processing procedure, a second creation unit to create the transmission packet in the second processing procedure using the second storage unit, and a control unit to control which one of the first and second creation units is used based on a data size necessary for the first creation unit to create the header and a free space of the first storage unit.

A multimedia streaming and network apparatus is provided that includes a router module, a storage module and a processing module for executing the application program in the storage module to perform the multimedia streaming and network apparatus operation method. A first streaming request packet corresponding to a physical STB is received through a LAN port. A multicast and hardware offload function corresponding to the LAN port is activated. A STB virtual machine is operated to perform a STB function. A second streaming request packet corresponding to the STB virtual machine is received. A multicast and hardware offload function corresponding to the processing module port is activated. A video stream from a remote server is transmitted by the router module through the LAN port and the processing module port respectively to the physical STB and the STB virtual machine to be processed and playback.

Embodiments of the present disclosure are directed to protocol state transition and/or resource state transition tracker configured to monitor, e.g., via filters, for certain protocol state transitions/changes or host hardware resource transitions/changes when a host processor in the control plane that performs such monitoring functions is unavailable or overloaded. The filters, in some embodiments, are pre-computed/computed by the host processor and transmitted to the protocol state transition and/or resource state transition tracker. The protocol state transition and/or resource state transition tracker may be used to implement a fast upgrade operation as well as load sharing and or load balancing operation with control plane associated components.

Embodiments of the present disclosure are directed to protocol state transition and/or resource state transition tracker configured to monitor, e.g., via filters, for certain protocol state transitions/changes or host hardware resource transitions/changes when a host processor in the control plane that performs such monitoring functions is unavailable or overloaded. The filters, in some embodiments, are pre-computed/computed by the host processor and transmitted to the protocol state transition and/or resource state transition tracker. The protocol state transition and/or resource state transition tracker may be used to implement a fast upgrade operation as well as load sharing and or load balancing operation with control plane associated components.

Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.

Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.

A novel algorithm for packet classification that is based on a novel search structure for packet classification rules is provided. Addresses from all the containers are merged and maintained in a single Trie. Each entry in the Trie has additional information that can be traced back to the container from where the address originated. This information is used to keep the Trie in sync with the containers when the container definition dynamically changes.

A modular digital optical gunsight (MDOG) peripheral module validation device includes an MDOG data connector configured to connect to an MDOG peripheral module and to receive and/or transmit MDOG data in a first format to or from the MDOG peripheral module, a translation module configured to translate the MDOG data in the first format to a second format that is compatible with a personal computer (PC), and a PC data connector configured to connect the validation device to a PC and to receive and/or transmit the MDOG data in the second format to the PC. The translation module can be configured to translate data in the second format to the first format.