A method and a device related to the field of mobile terminals and for reducing power consumption of a terminal device when the terminal device enters a doze mode, where after detecting that screen-off duration of the terminal device is greater than first duration, the terminal device sends a transmission control protocol reset packet to an application server of a to-be-controlled application to enable the application server to disconnect a Transmission Control Protocol (TCP) connection to the terminal device.

Provided herein are exemplary systems and methods for an architecture for converged industrial control and real time applications, the architecture comprising a physical network port, a switching module, an embedded ARM core, a network interface controller, and a multi-core computing module. According to further exemplary embodiments, the physical network port is an ethernet port capable of supporting a real-time field bus. The switching module may be configured to support a multiport ethernet switch. The switching module may also be configured to enable a backplane mesh to interconnect multiple foglets. Additionally, the embedded ARM core may be within the switching module, and the embedded ARM core may be configured to support virtualization.

A request for data from a distributed table is received at a network interface controller system. The request for data from the distributed table is identified as a request to be processed by the network interface controller system instead of a processor of a host computer system. The requested data is requested and received from a memory of the computing host computer system via a computer interface of the network interface controller system. The received requested data is caused to be cached in a cache of the network interface controller system.

Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.

Technologies for processing network packets by a host interface of a network interface controller (NIC) of a compute device. The host interface is configured to retrieve, by a symmetric multi-purpose (SMP) array of the host interface, a message from a message queue of the host interface and process, by a processor core of a plurality of processor cores of the SMP array, the message to identify a long-latency operation to be performed on at least a portion of a network packet associated with the message. The host interface is further configured to generate another message which includes an indication of the identified long-latency operation and a next step to be performed upon completion. Additionally, the host interface is configured to transmit the other message to a corresponding hardware unit scheduler as a function of the subsequent long-latency operation to be performed. Other embodiments are described herein.

A packet processing technique can include selecting a protocol field from the packet, and performing a comparison of the selected protocol field with comparison data in a compare logic array to output a protocol index. The protocol index can be used as an address to read parsing commands from a parse control table, and a parse result can be generated based on executing the parsing commands on the packet. The parse results are used to derive a parse result vector, which can be used by a forwarding engine to forward the packet.

Embodiments of a system and method for dynamic hardware acceleration are generally described herein. A method may include identifying a candidate task from a plurality of tasks executing in an operating environment, the operating environment within a hardware enclosure, the candidate task amenable to hardware optimization, instantiating, in response to identifying the candidate task, a hardware component in the operating environment to perform hardware optimization for the task, the hardware component being previously inaccessible to the operating environment, and executing, by the operating environment, a class of tasks amenable to the hardware optimization on the hardware component.

Distributed computing systems, devices, and associated methods of packet routing are disclosed herein. In one embodiment, a method includes receiving, from a computing network, a packet at a packet processor of a server. The method also includes matching the received packet with a flow in a flow table contained in the packet processor and determining whether the action indicates that the received packet is to be forwarded to a NIC buffer in the outbound processing path of the packet processor instead of the NIC. The method further includes in response to determining that the action indicates that the received packet is to be forwarded to the NIC buffer, forwarding the received packet to the NIC buffer and processing the packet in the NIC buffer to forward the packet to the computer network without exposing the packet to the main processor.

A method and system of accelerating monitoring of network traffic. The method may include receiving, at a network chip of a network device, a network traffic data unit; capturing, by the network chip, the network traffic data unit based on a traffic sampling rate; adding, by the network chip, a sampling header to the network traffic data unit to obtain a sampled network traffic data unit; sending the sampled network traffic data unit from the network chip to a sampling engine; receiving, from the sampling engine, a flow datagram that includes a network traffic data unit portion and a flow datagram header; generating a flow network data traffic unit that includes the flow datagram; and transmitting the flow network data traffic unit towards a collector.

A method, computer program product, and computer system for utilizing a first plurality of APIs operating on a first module, wherein the first module may be transportable during operation. A second plurality of APIs operating on a second module may be utilized, wherein the second module may be transportable during operation, wherein the second module may include kernel level binary validation and restoration software, and wherein at least one of the first module and the second module may be interconnected to a mesh topology that maintains asymmetric redundancy. An asset may be interfaced with the second module. It may be determined whether the asset is end-to-end secure based upon, at least in part, the kernel level binary validation and restoration software. An interface may be established between the asset and the first module based upon, at least in part, determining that the asset is secure.