A printed circuit board structure and a wiring method therefor are disclosed. The printed circuit board structure comprises a first wiring channel formed inside the printed circuit board for transmitting a circuit signal; a pin, connected to the first wiring channel for connecting a chip to the printed circuit board; the pin comprising an unused pin and a used pin, the used pin comprising a peripheral pin and an internal pin; wherein the printed circuit board further comprises a second wiring channel, the second wiring channel leads out the internal pin by means of covering at least a portion of the unused pin. By means of using a printed circuit board structure and a wiring method to configure pins of the printed circuit board, the number of printed circuit board layers is reduced, and the current carrying capacity is enhanced.

For printed circuit board (PCB) design, methods, systems, and apparatuses are disclosed. One apparatus includes a component ID module that identifies a PCB component to be placed on a current board design; a search module that displays one or more instances of previous board designs containing the identified PCB component, wherein displaying the one or more instances of previous board designs containing the identified PCB component comprises displaying a region surrounding the identified PCB component; and an import module that imports a selected portion of a board design into the current board design from a selected one of the instances of previous board designs containing the identified PCB component.

A PCB stencil manufacturing method and system. The method comprises: inputting PCB stencil design information in a preset input format, the PCB stencil design information comprises solder pad element information; and converting the PCB stencil design information into corresponding system core data information, the system core data information comprises solder pad element packaging information, and the solder pad element packaging information comprises a solder pad element packaging pattern and solder pad element coordinates; and querying a stencil opening database according to the solder pad element packaging pattern, records in the stencil opening database comprise the following attributes: a solder pad element packaging pattern and a stencil opening pattern; and placing a stencil opening pattern corresponding to a matching solder pad element packaging pattern to an opening layer according to the solder pad element coordinates.

A method of manufacturing a printed circuit board assembly includes providing a circuit board, positioning a plurality of components including at least one thermally-sensitive component having a maximum temperature threshold on the circuit board, positioning a customized protective heat shield on the thermally-sensitive component, exposing the circuit board (having the thermally-sensitive component disposed thereon and the customized protective heat shield disposed on the thermally-sensitive component) to a high-temperature environment wherein temperatures exceed the maximum temperature threshold of the thermally-sensitive component, and removing the customized protective heat shield from the thermally-sensitive component. Customized protective heat shields are also provided.

Traces on a PCB can be spaced closer together than in conventional layouts, which previously required the pair-to-pair spacing for the high-speed differential stripline signals to be at least 5H if the signals are originating from the same source and 7H when the signals on two pairs of transmission lines in the traces originate from different sources. Traces may be spaced closer together when, for example, a ratio of the core height to the prepreg height of the printed circuit board is approximately equal to one. Traces may be spaced closer together when, for example, a ratio of the trace spacing distance to the core height distance is less than approximately one. By implementing one or both of these design rules, printed circuit board layouts can be designed, and printed circuit boards manufactured from those designs, that have an intra-group spacing between the first pair and the second pair measured at a point at which the first pair is closest to the second pair of less than approximately five times the prepreg height (the limit for previous printed circuit board designs).

The disclosure relates to methods and compositions for direct printing of circuit boards having an electromagnetically-shielded tracks and/or components. Specifically, the disclosure relates to the direct, uninterrupted and continuous 3D printing of insulation-jacketed tracks and/or components with metallic shielding sleeves or capsule.

A system and method to automatically determine power plane shape in a printed circuit board (PCB) involve obtaining inputs. The inputs include a size and shape of the PCB, a set of sources, and a set of sinks associated with a power plane. The method also includes determining a center of charge (CoC) as a center of largest current density for the set of sources and the set of sinks, and creating a sub-shape corresponding with a path from each source of the set of sources and from each sink of the set of sinks to the CoC. The creating the sub-shape includes determining a width of a conductor in the path corresponding with each of the sub-shapes. The sub-shapes created for the set of sources and the set of sinks are combined as the power plane shape.

A printed circuit board having a substrate layer, at least one electrically conductive trace disposed on the substrate layer, and a solder mask layer disposed over the substrate layer and the electrically conductive trace, wherein the solder mask later includes a void region over at least a portion of the electrically conductive trace. Also, a method of optimizing printed circuit board designing including selecting printed circuit board data comprising at least a solder mask layer area, varying the solder mask layer area, determining an insertion loss value for each varied solder mask layer area, comparing the insertion loss values for each varied solder mask layer area, and selecting a solder mask layer area based on the comparing.

An assembly method and device for a circuit structural member, and a circuit structural member. The assembly method comprises: measuring a depth and path of a channel between at least one chip and a printed circuit board (PCB), the at least one chip being arranged on the PCB; determining a thickness and path of a heat dissipation reinforcement material according to the depth and path of the channel between the at least one chip and the PCB and a predetermined heat dissipation parameter, so as to configure a dispensing parameter and a dispensing path; coating the heat dissipation reinforcement material in the channel between the at least one chip and the PCB according to the dispensing parameter and dispensing path; and heating the heat dissipation reinforcement material to a first predetermined temperature, such that the heat dissipation reinforcement material permeates into the chip and the PCB.

In one embodiment, a method includes inspecting a fiber weave for use in a printed circuit board with an automated optical inspection tool and identifying a distance between fiber bundles in the fiber weave. The fiber weave comprises a plurality of the fiber bundles woven to form the fiber weave and a portion of the fiber bundles comprise markers and identifying a distance between the fiber bundles in the fiber weave comprises measuring a distance between the markers.