Circuit boards and computer-implemented methods for designing circuit boards are disclosed. In one embodiment, a method of designing a circuit board having an insulator substrate includes determining, by a computer, a plurality of thermal conductor traces that is arranged to direct heat flux generated by a heat generating component away from a temperature sensitive component, and determining a plurality of electrical connection traces based on an input schematic. At least a portion of the plurality of electrical connection traces incorporate at least a portion of the plurality of thermal conductor traces to define a conductive trace pattern that electrically connects pins of two or more components located on the substrate. The conductive trace pattern includes the plurality of thermal conductor traces and the plurality of electrical connection traces. Disruption of the plurality of thermal conductor traces is avoided while determining the plurality of electrical connection traces.

Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a surface mount component including: a plurality of metal pads on the surface of one side of the PCB corresponding to connection points on the component, wherein at least a portion of the plurality of metal pads have stubs which extend outside the boundary of the surface mount component when the surface mount component is mounted to the PCB; and wherein the stubs have sufficient thermal conductivity to facilitate at least one of the set of dismounting and reattaching of the surface mount component.

A method includes: providing a first layout of a first layer over a substrate, the first layer having at least one metal pattern, and generating a second layout by placing a cut mask at a first position relative to the substrate to remove material from a first region of the at least one metal pattern to provide a first metal pattern and placing the cut mask at a second position relative to the first layer over the substrate to remove material from a second region of the at least one metal pattern to provide a second metal pattern.

A welding quality processing method and device, and a circuit board. The method includes: obtaining warpage data of each circuit board layer in a multi-layer circuit board under a preset welding temperature change curve; performing simulation according to a stacked state of the multi-layer circuit board and the warpage data to generate a warpage level of each region in the multi-layer circuit board in the stacked state; and processing the multi-layer circuit board according to the warpage level.

A method and apparatus for inputting a plurality of different circuit schematics designed with printed circuit board (PCB) mountable components; extracting circuit topologies for said plurality of different circuit schematics; transforming said extracted circuit topologies to a fixed number of connection points; and generating a configurable circuit PCB physical layout pattern having said fixed number of connection points such that said PCB mountable components when positioned on one or more of said fixed number of connection points can implement any circuit represented by said plurality of different circuit schematics.

The disclosure relates to systems, methods and devices for mitigating warpage in printed circuit boards (PCBs) high-frequency connect PCBs (HFCPs), or additively manufactured electronics (AME) with surface mounted chip packages (SMT) during reflow processing for soldering the SMT to the PCB, HFCP, or AME. More specifically, the disclosure is directed to the fabrication of a surface-complementary dielectric mask, or reflow compression mask to substantially encapsulate the SMT, and mitigate warpage, and/or protect the PCB, HFCP, or AME during shipment and further manipulation or processing.

A system, method and computer program product for automated circuit trace generation and reconfiguration on a breadboard, includes a breadboard having a plurality of contact points; a switching matrix coupled to the contact points of the breadboard, and connected to a computer. The switching matrix is programmed by the computer to generate one or more circuit traces onto the contact points of the breadboard.

A stretchable circuit is provided in the invention. The stretchable circuit comprises a plurality of segments. Each segment includes a plurality of sub-segments. Each sub-segment includes at least one main line, at least one secondary line, and rib lines, and in each sub-segment, the main lines and the secondary lines are electrically connected to the rib lines.

The disclosure relates to systems and methods for fabricating passive RC frequency filter. More specifically, the disclosure is directed to computerized systems and methods for using additive manufacturing (AM) of simultaneous deposition of conductive and dielectric inks to form passive RC frequency pass filters having predetermined cutoff frequency with wide stop band frequency.

A stencil step design method and system, a computer readable storage medium and a device. The method comprises: acquiring data of stencil apertures for electronic components in a circuit board, and identifying the stencil apertures for electronic components one by one to determine whether the stencil apertures need to be stepped; and if yes, performing step design for the stencil apertures that need to be stepped according to preset step rules corresponding to the stencil apertures for electronic components one by one so as to generate a stencil step design file with the step design, and outputting the stencil step design file. According to the present disclosure, 90% or more steps can be automatically designed and the stencil step design is in conformity with processing requirements. A manual intervention process is omitted, and the design can be accomplished by several simple steps.