Patent classifications
H05K3/0011
Electronic component-embedded substrate and electronic component device
An electronic component-embedded substrate includes a core substrate, a cavity penetrating the core substrate, a wiring layer formed on one surface of the core substrate, a support pattern extending over the cavity and configured to divide the cavity into a plurality of component embedding areas, an insulation wall portion arranged on a part of the support pattern in the cavity and formed of the same material as the core substrate, a plurality of electronic components each of which is mounted in each of the plurality of component embedding areas, and an insulating material filling an inside of the cavity.
Alkoxysilane-modified polyamic acid solution, laminate and flexible device using same, and laminate manufacturing method
Provided are a polyamic acid solution that can be formed into a film without peeling even when the film is thick and can be stably stored at room temperature, and a laminate that can be suitably used for production of a flexible device. In the alkoxysilane-modified polyamic acid solution according to the present invention, an additive amount of an alkoxysilane compound that contains an amino group is more than 0.050 parts by weight and less than 0.100 parts by weight.
Electric connection structure and electric connection member
There is provided an electric connection member having a substrate, an insulating adhesive layer provided on the substrate, and a conductive interconnect, wherein the electric connection member is provided with a recess that opens at a side of the insulating adhesive layer, the conductive interconnect is disposed in the recess, a metal nano-ink is disposed on the conductive interconnect, and all of the metal nano-ink is contained inside the recess.
Circuit board
A circuit board includes a base layer, an electrode layer formed on the base layer, a passivation layer formed on the electrode layer while opening a part of the electrode layer, and a surface treatment layer formed on the open surface of the electrode layer. The surface treatment layer may contain 70 to 40% of copper and 30 to 60% of nickel.
ELECTRONIC COMPONENTS COATED WITH A TOPOLOGICAL INSULATOR
A method for increasing a service lifetime of an electronic component includes applying a topological insulator coating layer on a surface of the electronic component and performing a test on the electronic component with the topological insulator coating layer applied thereto. The electronic component with the topological insulator coating layer exhibits at least a 100% improvement during the test when compared to an otherwise equivalent electronic component without the topological insulator layer applied thereto. The electronic component with the topological insulator coating layer exhibits at least a 100% improvement during the test when compared to an otherwise equivalent electronic component with a graphene layer applied thereto. The test includes at least one of: a waterproofness test, an acetic acid test, a sugar solution test, and a methyl alcohol test.
Printed circuit board and method of manufacturing the same
A printed circuit board (PCB) includes: a substrate; and a circuit pattern disposed on the substrate, wherein the circuit pattern includes a first seed layer disposed on the substrate and including a nitride, and a metal layer disposed on the first seed layer.
PHOTO-CURABLE AND THERMO-CURABLE RESIN COMPOSITION AND CURED PRODUCT THEREOF
A photo-curable and thermo-curable resin composition includes an epoxy resin including an epoxy group; a carboxyl group-containing photosensitive resin; a photopolymerization initiator; and a filler, wherein a value of an equivalent number of the epoxy group/an equivalent number of the carboxyl group is from more than 1 to less than 2.
Method of fabricating an electrical device package structure
A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.
Method for manufacturing a printed circuit board assembly based on printed electronics
A printed circuit board assembly (1) and a method for manufacturing a printed circuit board assembly (1) are provided. The method comprises: providing a substrate (2), printing a circuit pattern on the substrate (2) thereby forming a bottom layer (4a) of an uncured conductive material (7) and a top layer (4b) of an insulating material (8), arranging at least one electronic component (5), having at least one electrical connection part (6), on the top layer (4b) of the circuit pattern, the at least one electrical connection part (6) of the at least one electronic component (5) forming at least one electrical connection (9) with the bottom layer (4a) comprising the uncured conductive material (7), and, after arranging said at least one electronic component (5) on the top layer (4b), curing the conductive material (7) and the insulating material (8). By this method, the conductive material (7) mechanically secures said at least one electronic component (5) to the substrate (2).
Resin substrate and electronic device
A resin substrate includes a first portion including a plurality of resin sheets provided at one end in a stacking direction and a second portion including a plurality of resin sheets provided at the other end in the stacking direction. The thickness of the plurality of resin sheets is the same or substantially the same as the thickness of the first portion and the second portion. The density of planar conductor patterns of the first portion with respect to the volume of the first portion is lower than the density of planar conductor patterns of the second portion with respect to the volume of the second portion. The average of the diameters of the first interlayer connection conductor provided in the first portion is greater than the average of the diameters of the second interlayer connection conductor provided in the second portion.