Disclosed herein is a method of forming vias in electrical laminates comprising laminating a sheet having a layer comprising a crosslinkable polymer composition to a substrate wherein the crosslinkable polymer composition has a viscosity at lamination temperatures in the range of 200 Pa-s to 100,000 Pa-s, forming at least one via in the crosslinkable polymer layer by laser ablation; and after the forming of the at least one via, thermally curing the crosslinkable polymer layer. According to certain embodiments the cross linkable polymer composition has a viscosity at lamination temperature of at least 5000 Pa-s. This method yields good lamination results, good via profiles, and good desmear results when such compositions are used and the via is laser ablated before cure.

A circuit board, including a first dielectric material, a second dielectric material, a third dielectric material, a fourth dielectric material, a first external circuit layer, a second external circuit layer, a conductive structure, a first conductive via, and multiple second conductive vias, is provided. The first conductive via at least passes through the first dielectric material and the fourth dielectric material, and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias pass through the first dielectric material, the second dielectric material, the third dielectric material, and a part of the conductive structure, and surround the first conductive via. The second conductive vias are electrically connected to the first external circuit layer, the conductive structure, and the second external circuit layer to define a ground path, and the ground path surrounds the signal path.

Even if a print board includes through holes that are hardly filled with material previously, the through holes can be filled with filling material appropriately. The sealing film is attached to a lower surface of the print board and the filling material is supplied from the upper surface side of the print board under a vacuum atmosphere with screen printing to fill the through holes with the filling material. Then, the film is separated from the print board and the print board is disposed on the jig plate including recesses such that the through holes correspond to the recess. Thereafter, an auxiliary filling process in which the filling material is supplied again such that the filling material protrudes from the lower surface side of the through hole is performed.

Voids are introduced in a copper shape to reduce warpage experienced by a printed circuit board during a reflow process. Copper shapes on an outer layer of a printed circuit board may be used to connect large packages that include ball grid arrays to the printed circuit board. The copper shapes may induce warpage in the printed circuit board during the reflow process. Routing a mesh pattern of voids in the copper shapes may reduce solder ball joint cracking and pad cratering during reflow and make solder joints more reliable. The voids may make the copper shapes less ridged and change the copper heat dissipation profile to remove sharp warpage forces that cause solder joints to experience pad cratering. The voids may be 8 mil x 8 mil cuts or indentations in the copper shape.

Provided is a shielded printed wiring board that exhibits excellent connection stability even when having a through-hole with a small opening area, and enables a high degree of freedom in circuit design. The shielded printed wiring board 1 according to the present invention includes a printed wiring board 10, an insulating layer 22, and a conductive adhesive layer 21 disposed between the printed wiring board 10 and the insulating layer 22. The printed wiring board 10 includes a base 11, a circuit pattern 13 disposed on the base, and an insulating protective layer 14 covering the circuit pattern 13. The shielded printed wiring board has a through-hole 23 for external grounding that vertically penetrates the insulating layer 22 and the conductive adhesive layer 21. The conductive adhesive layer 21 has an extension 21a extending toward the inside of the through-hole 23 as compared with the insulating layer 22.

Methods, systems, and apparatus for coating the internal surface of nano-scale cavities on a substrate are contemplated. A first fluid of high wettability is applied to the nano-scale cavity, filling the cavity. A second fluid carrying a conductor or a catalyst is applied over the opening of the nano-scale cavity. The second fluid has a lower vapor pressure than the first fluid. The first fluid is converted to a gas, for example by heating the substrate. The gas exits the nano-scale cavity, creating a negative pressure or vacuum in the nano-scale cavity. The negative pressure draws the second fluid into the nano-scale cavity. The conductor is deposited on the interior surface of the nano-scale cavity, preferably less than 10 nm thick.

A filling assembly for filling holes formed in a board with a filling material, including: a board holding device having a carrier frame formed by frame elements to hold the board; a filling device arranged on a side of the carrier frame and includes a filling material feeding device with a filling head to provide filling material to the board, wherein the filling head is movable relative to the carrier frame parallel to the carrier frame surface; a screen holding frame formed by screen holding frame elements to hold a screen between the carrier frame and the filling device, wherein the screen includes a screen cloth surrounded by a screen frame; and a fixing device with an expansion element arranged in a frame element, wherein the expansion element can provide a temporary compressive force to the screen frame to fixedly press the screen frame against a screen holding frame.

Devices, methods, and systems for forming an electrical circuit out of a conductor embedded in two layers of substrate are disclosed. Portions of the two layers of substrate and the conductor are removed, forming a cavity through the two layers and the conductor. A blocker material is deposited along the wall of the cavity. A portion of the blocker material and adjacent layer of the substrate is removed forming another cavity in contact with a part of the conductor. A surface of the second cavity is then electroless plated by a conductive metal to form part of the electrical circuit.

Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.

In the manufacture method of the present invention, an inner circuit structure is prepared, and a docking pad is formed on the first surface of the inner circuit structure. A release film is mounted on the first surface to cover the docking pad before mounting a build-up circuit structure upon the first surface. The release film and part of the build-up circuit structure above it are removed. The docking pad is therefore exposed and a docking opening is formed in the build-up circuit structure. The docking opening is for mounting a circuit board to be docked to form a circuit board module of the present invention.