Methods, systems, and apparatus for coating the internal surface of nano-scale cavities on a substrate are contemplated. A first fluid of high wettability is applied to the nano-scale cavity, filling the cavity. A second fluid carrying a conductor or a catalyst is applied over the opening of the nano-scale cavity. The second fluid has a lower vapor pressure than the first fluid. The first fluid is converted to a gas, for example by heating the substrate. The gas exits the nano-scale cavity, creating a negative pressure or vacuum in the nano-scale cavity. The negative pressure draws the second fluid into the nano-scale cavity. The conductor is deposited on the interior surface of the nano-scale cavity, preferably less than 10 nm thick.

A printed circuit board is provided with multiple electrically conductive layers which are separated from each other by electrically non-conductive layers. At least one electrically conductive outer layer and multiple electrically conductive intermediate layers are provided. At least one electrically conductive through-connection is provided between an electrically conductive outer layer and an electrically conductive intermediate layer. The printed circuit board consists of at least one first multilayer PCB and one second multilayer PCB. The first multilayer PCB is formed from multiple electrically conductive layers and multiple electrically non-conductive layers, and the second multilayer PCB has at least one electrically conductive layer and at least one electrically non-conductive layer. The multilayer PCBs are connected to each other. The electrically conductive through-connection between a first electrically conductive outer layer and a second electrically conductive outer layer is formed from multilayer PCBs.

A component carrier includes an electrically insulating layer structure, a first electrically conductive layer structure, a second electrically conductive layer structure, and a laser through-hole with an electrically conductive medium filling at least part of the through-hole. The first electrically conductive layer structure covers a first side of the electrically insulating layer structure and has a first window extending through the first electrically conductive layer structure formed by etching using a conformal mask. The second electrically conductive layer structure covers an opposed side of the electrically insulating layer structure and has a second window extending through the second electrically conductive layer structure formed by etching using a conformal mask. The laser through-hole extends through the electrically insulating layer structure. At least a portion of at least one sidewall of the electrically conductive layer structures delimiting the windows is tapered.

The object of the invention is to provide a double-sided circuit non-oxide-based ceramic substrate excellent in radiation property and low in cost, and a method for manufacturing the same. A double-sided circuit non-oxide-based ceramic substrate related to the present invention includes a high heat-conductive non-oxide-based ceramic substrate that includes a through hole, a holding layer that is formed on a wall surface of the through hole, and an electro-conductive metal section that is held inside the through hole by the holding layer and does not include an active metal. The double-sided circuit non-oxide-based ceramic substrate related to the present invention preferably includes electrodes (thin film electrodes) that shield end surfaces of the holding layer and end surfaces of the electro-conductive metal section which are exposed to front and back surfaces of the ceramic substrate.

The present disclosure discloses a multilayer circuit board comprising a plurality of metal layers, a blind via and/or a buried via, the multilayer circuit board is capable of transmitting signal between the different metal layers. The blind via has a pad on a non-opening side of the blind via. An upper or lower layer metal layer on the non-opening side of the blind via adjacent to the blind via has a first hole which is located in a position corresponding to the pad on the non-opening side of the blind via in a depth direction of the blind via; and/or an upper and/or lower layer adjacent to the buried via has a second hole which is located in a position corresponding to the pad of an upper and/or lower orifice of the buried via in a depth direction of the buried via.

A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.

A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

A circuit board and a method of manufacturing the same are provided. The method includes the following steps of providing a first conductive layer; providing an adhesive material and at least one conductive bump, in which the adhesive material is electrically conductive; adhering at least one conductive bump to a surface of the first conductive layer using the adhesive material; providing an insulation layer; disposing the insulation layer on the surface of the first conductive layer and at least one conductive bump; and disposing a second conductive layer on the insulation layer.

An electronic circuit including a substrate having a first dielectric characteristic. The substrate can include a first side and a second side. An intermediary material can be disposed within the substrate. For instance, the intermediary material can be located between the first side and the second side. The intermediary material can include a second dielectric characteristic, where the second dielectric characteristic is different than the first dielectric characteristic. A first conductive layer can be disposed on the first side, and a second conductive layer can be disposed on the second side. A conductive path can be electrically coupled between the first conductive layer and the second conductive layer. The conductive path can be in contact with at least a portion of the intermediary material.

A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first, second and third sub-circuit boards are electrically connected to one another.