H05K3/0097

Circuit board structure and manufacturing method thereof

A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

Reel-to-reel lamination methods and devices in FPC fabrication
11516921 · 2022-11-29 · ·

A reel-to-reel lamination method to laminate a metal foil or circuitry pattern on the fly. The method includes applying a UV laminate or thermoset laminate to the metal foil or the circuitry pattern reel to reel, and then apply a UV radiation or heat to the laminate. There can be an optional enclosure connected to a suction source. The enclosure can have a flexible bladder that physically compresses the laminate.

Three-dimensional multi-layer electronic device production method
11458722 · 2022-10-04 · ·

Disclosed is a method of manufacturing a three-dimensional multi-layer electronic device, the method including: a unit forming process of forming a multi-layer unit including an electronic component and a circuit wiring by three-dimensional lay-out forming; and a unit lay-out process of manufacturing a three-dimensional multi-layer electronic device by laying out and integrating the multi-layer unit in a vertical direction.

LEAD FRAME, PACKAGED INTEGRATED CIRCUIT BOARD, POWER CHIP, AND CIRCUIT BOARD PACKAGING METHOD
20220223506 · 2022-07-14 ·

Disclosed is a packaging solution, such as a lead frame for circuit board packaging, a packaged integrated circuit board, a power chip, and a circuit board packaging method. The lead frame includes a plurality of frame units disposed in parallel in a first direction. The frame unit includes a hollow bezel, and a plurality of pins and connecting ribs that are disposed in the bezel. Each pin includes a first pin part and a second pin part that extend in a second direction and are integrally formed. The first pin part is disposed in the bezel, the first pin part is configured to electrically connect to a circuit board, and the second pin part is connected and fastened to the bezel. The second direction is perpendicular to the first direction. The connecting ribs are connected among the plurality of pins and the bezel.

DEVICE FOR CONNECTING A SMART CARD TO A TEXTILE AND METHOD FOR MANUFACTURING ELECTRONIC CARDS IN A FLEXIBLE SMART CARD FORMAT
20220253664 · 2022-08-11 ·

Disclosed is an electronic card, in the form of a flexible smart card provided with a flexible circuit, that includes a bottom face receiving electronic components and a top face provided with contact tabs intended to be connected to conductive tracks of a garment textile. The flexible circuit being covered on its bottom face with at least one bottom layer of bonding adhesive, first polymer layers provided with cutouts for receiving components and second polymer layers for encapsulating the components, and covered on its top face with a top layer of bonding adhesive and at least one top layer forming an outer face of the card made from polymer material provided with cutouts for accessing the contact tabs, in which at least some of the contact tabs are produced on the rim of the card and provided with an end part on the edge of the card.

WIRING SUBSTRATE
20220248530 · 2022-08-04 · ·

A wiring substrate having no core substrate includes a build-up layer including insulating layers and conductor layers such that the insulating layers include first, second, third and fourth insulating layers and that the conductor layers include a first conductor layer formed on the first insulating layer and a second conductor layer formed on the second insulating layer. The build-up layer has a first surface having the first insulating and first conductor layers, a second surface having the second insulating and second conductor layers, the third insulating layer formed on the first insulating layer on the opposite side of the first conductor layer, and the fourth insulating layer formed on the second insulating layer on the opposite side of the second conductor layer, and the build-up layer is formed such that the first and second insulating layers contain no core material and the third and fourth insulating layer include core material.

Electronic devices comprising a via and methods of forming such electronic devices

A composite article includes a conductive layer with nanowires on at least a portion of a flexible substrate, wherein the conductive layer has a conductive surface. A patterned layer of a low surface energy material is on a first region of the conductive surface. An overcoat layer free of conductive particulates is on a first portion of a second region of the conductive surface unoccupied by the patterned layer. A via is in a second portion of the second region of the conductive surface between an edge of the patterned layer of the low surface energy material and the overcoat layer. A conductive material is in the via to provide an electrical connection to the conductive surface.

Separable modules PCB modules

The invention provides a printed circuit board (10) including a first electrically conductive track (210), wherein the printed circuit board (10) comprises a set (15) of two printed circuit board areas (100) both comprising a part of the first electrically conductive track (210), wherein printed circuit board (10) further comprises a perforation line (300) between the two printed circuit board areas (100) for customizing the printed circuit board (10) into two physically separated printed circuit board area comprising parts (1100), wherein the perforation line (300) is configured as a non-straight line, wherein the perforation line (300) comprises relative to one of the printed circuit board areas (100), and in a plane of the printed circuit board (10), a first projecting part (311) and a first recessed part (312), wherein the first recessed part (312) is recessed relative to the first projecting part (311), wherein the first electrically conductive track (210) is intercepted by the perforation line (300) at the first recessed part (312).

Method of manufacturing bonded body for insulation circuit substrate board and bonded body for insulation circuit substrate board

Forming aluminum circuit layers forming an aluminum circuit layers on one surface of a ceramic substrate and forming copper circuit layers are included. The copper circuit layers are formed by laminating copper boards for the circuit layers on the respective aluminum circuit layers, arranging the laminate between a pair of support boards having a convex curved surface at least on one surface so as to face to each other, moving the support boards in a facing direction to press the laminate in a lamination direction, and heating in this pressing state so that the copper boards for the circuit layers are bonded on the aluminum circuit layers respectively by solid phase diffusion. In the step of forming the copper circuit layers, the support boards are arranged so that either one of the convex curved surface is in contact with the adjacent copper boards for the circuit layers in the laminate.

SUBSTRATE MOTHERBOARD AND MANUFACTURING METHOD THEREOF, DRIVING SUBSTRATE AND DISPLAY DEVICE
20220104348 · 2022-03-31 ·

The present disclosure provides a substrate motherboard including: a first substrate base, a first conductive pattern layer, at least one first insulating layer and a second conductive pattern layer which are sequentially arranged. The first conductive pattern layer includes a plurality of signal lines in the active region. The second conductive pattern layer includes a plurality of connection terminals in the active region, and the plurality of connection terminals are electrically coupled to corresponding signal lines in the plurality of signal lines. The substrate motherboard further includes a plurality of leading-out wires and a plurality of detection terminals in the non-active region, first ends of the plurality of leading-out wires are electrically coupled to corresponding connection terminals and extending to the non-active region to be electrically coupled to corresponding detection terminals through second ends thereof.