Patent classifications
H05K3/10
Electronic circuit and method of fabricating the same
Provided is an electronic circuit including a substrate having a flat device region and a curved interconnection region. A conduction line may extend along an uneven portion in the interconnection region and may be curved. The uneven portion and the conductive line may have a wavy shape. An external force applied to the electronic circuit may be absorbed by the uneven portion and the conductive line. The electronic device may not be affected by the external force. Therefore, functions of the electronic circuit may be maintained. A method of fabricating an electronic circuit according to the present invention may easily adjust areas and positions of the interconnection region and the device region.
Electronic circuit and method of fabricating the same
Provided is an electronic circuit including a substrate having a flat device region and a curved interconnection region. A conduction line may extend along an uneven portion in the interconnection region and may be curved. The uneven portion and the conductive line may have a wavy shape. An external force applied to the electronic circuit may be absorbed by the uneven portion and the conductive line. The electronic device may not be affected by the external force. Therefore, functions of the electronic circuit may be maintained. A method of fabricating an electronic circuit according to the present invention may easily adjust areas and positions of the interconnection region and the device region.
Liquid metal-based flexible electronic device and preparation method and use thereof
Provided is a liquid metal-based flexible electronic device and a method for preparing a liquid metal-based flexible electronic device, that includes: preparing an Acrylonitrile Butadiene Styrene (ABS) plastic model; performing an ion sputtering on a surface of the ABS plastic model to form a gold film, to obtain a gold-plated ABS circuit; introducing a first silica gel into a mold to suspend the gold-plated ABS circuit inside the mold, and curing the first silica gel to obtain a cured model; immersing the cured model in acetone to dissolve the ABS model, to obtain a microchannel with a gold plating on an inner wall of the microchannel in a first silica gel substrate; and injecting a gallium-indium eutectic, inserting a copper wire, and applying a second silica gel and curing the second silica gel, to obtain the liquid metal-based flexible electronic device.
METHOD OF FORMING A LOW LOSS ELECTRONICS ASSEMBLY
A method of forming an electronics assembly includes providing a substrate, attaching an electronics component to the substrate, disposing one or more dielectric ramps on the substrate along at least a portion of a perimeter of the electronics component, disposing a first ground plane over the substrate and the dielectric ramp(s), disposing a first dielectric over the first ground plane, disposing a stripline over the first dielectric, disposing a second dielectric over the stripline and the first dielectric, and disposing a second ground plane over the second dielectric.
CERAMIC BOARD WITH MEMORY FORMED IN THE CERAMIC
The present disclosure is directed to a ceramic substrate that includes a plurality of contact pads, a plurality of electrical traces, and a microelectromechanical die. Contacts on the die are coupled to the plurality of contact pads through the plurality of electrical traces. The substrate also includes a plurality of memory bits formed directly on the substrate. Each memory bit is coupled between a first one of the contact pads and a second one of the contact pads.
CERAMIC BOARD WITH MEMORY FORMED IN THE CERAMIC
The present disclosure is directed to a ceramic substrate that includes a plurality of contact pads, a plurality of electrical traces, and a microelectromechanical die. Contacts on the die are coupled to the plurality of contact pads through the plurality of electrical traces. The substrate also includes a plurality of memory bits formed directly on the substrate. Each memory bit is coupled between a first one of the contact pads and a second one of the contact pads.
DOUBLE LAYER CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
Provided is a double layer circuit board and a manufacturing method thereof. The double layer circuit board comprises a substrate, a first circuit layer formed on a first surface of the substrate, a second circuit layer formed on a second surface of the substrate, and at least one connecting pillar formed in and covered by the substrate. Each one of the at least one connecting pillar includes a first end connected to the first circuit layer and a second end connected to the second circuit layer. A terminal area of the second end is greater than a terminal area of the first end. Therefore, the second circuit layer is firmly connected to the first circuit layer through the at least one connecting pillar. A yield rate of the double layer circuit board may be increased.
METHOD OF PREPARING ARTICLE WITH POLYANILINE COATING
A method is used to provide an electrically-conductive polyaniline pattern by providing a uniform layer of a photocurable composition on a substrate. The photocurable composition comprises a water-soluble reactive polymer comprising (a) greater than 40 mol % of recurring units comprising sulfonic acid or sulfonate groups, and (b) at least 5 mol % of recurring units comprising a pendant group capable of crosslinking via [2+2] photocycloaddition. The photocurable composition is exposed to cause crosslinking via [2+2] photocycloaddition of the (b) recurring units, thereby forming a crosslinked polymer. Any remaining water-soluble reactive polymer is removed. The crosslinked polymer is contacted with an aniline reactive composition having aniline monomer and up to 0.5 molar of an aniline oxidizing agent, thereby forming an electrically-conductive polyaniline disposed either within, on top of, or both within and on top of, the crosslinked polymer.
STAMP FOR PRINTED CIRCUIT PROCESS AND METHOD OF FABRICATING THE SAME AND PRINTED CIRCUIT PROCESS
A stamp that is configured to be employed in a printed circuit process, a method of fabricating the stamp, and a printed circuit process are provided, and the stamp includes a main structure, a micro-protrusion structure, and a plurality of nano-conical structures. The micro-protrusion structure is located on the main structure. The nano-conical structures are located on the main structure and surround the micro-protrusion structure.
METHODS AND DEVICES FOR PROVIDING INCREASED ROUTING FLEXIBILITY IN MULTI-LAYER PRINTED CIRCUIT BOARDS
A build-up process for fabricating a multi-layer PCB is provided during which a mezzanine redistribution, or routing, structure is formed within one of the PCB dielectric material layers that allows additional electrical interconnections (i.e., traces and crossovers) to be made within that layer, thereby obviating the need to add an additional PCB layer in order to make those interconnections. The mezzanine redistribution structure also can be interconnected with the metal layers that are above and below it to further increase routing complexity and flexibility. The mezzanine redistribution structure can be formed without increasing the total thickness of the PCB and without substantially increasing costs.