A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions. Methods of producing the power semiconductor module and power electronic assemblies that incorporate the power semiconductor module are also described.

A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions. Methods of producing the power semiconductor module and power electronic assemblies that incorporate the power semiconductor module are also described.

A heat sink component can include a body including a thermally conductive material that is electrically non-conductive, a lower conductive layer formed over a bottom surface of the body and electrically connected with the ground plane layer, and an upper conductive layer formed over a top surface of the body. The heat sink component can have a length in an X-direction that is parallel with the top surface of the body and a thickness in a direction perpendicular to the top surface. A ratio of the length to the thickness can be greater than about 7.

A flexible device includes: (1) a flexible substrate; and (2) an interconnect disposed over the flexible substrate, wherein the interconnect has a varying vertical displacement along its length, relative to a top surface of the flexible substrate.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

A circuit board includes a metal substrate, a resin layer, an insulating layer, and a first conductive structure. The metal substrate has a first through hole, and the first through hole has a first width. A portion of the resin layer is disposed in the first through hole. The resin layer has a second through hole. The second through hole has a second width. The insulating layer is disposed on at least one surface of the metal substrate, and a portion of the insulating layer contacts the resin layer. The first conductive structure is disposed in the second through hole. The first conductive structure penetrates through the metal substrate. The first width is greater than the second width. A manufacturing method of the circuit board is also provided.

A method of printing comprises providing a component source wafer comprising components, a transfer device, and a patterned substrate. The patterned substrate comprises substrate posts that extend from a surface of the patterned substrate. Components are picked up from the component source wafer by adhering the components to the transfer device. One or more of the picked-up components are printed to the patterned substrate by disposing each of the one or more picked-up components onto one of the substrate posts, thereby providing one or more printed components in a printed structure.

A method of printing comprises providing a component source wafer comprising components, a transfer device, and a patterned substrate. The patterned substrate comprises substrate posts that extend from a surface of the patterned substrate. Components are picked up from the component source wafer by adhering the components to the transfer device. One or more of the picked-up components are printed to the patterned substrate by disposing each of the one or more picked-up components onto one of the substrate posts, thereby providing one or more printed components in a printed structure.

Embodiments disclosed herein comprise package substrates and methods of forming package substrates. In an embodiment, a package substrate comprises a core substrate. A hole is disposed into the core substrate, and a via is disposed in the hole. In an embodiment, the via completely fills the hole. In an embodiment, a method of forming a package substrate comprises exposing a region of a core substrate with a laser. In an embodiment, the laser changes the morphology of the exposed region. The method may further comprise etching the core substrate, where the exposed region etches at a faster rate than the remainder of the core substrate to form a hole in the core substrate. The method may further comprise disposing a via in the hole.

Embodiments disclosed herein include package substrates for electronic packaging applications. In an embodiment, a package substrate comprises a first glass layer, where the first glass layer comprises a first via through the first glass layer, and the first via has an hourglass shaped cross-section. The package substrate may further comprise a second glass layer over the first glass layer, where the second glass layer comprises a second via through the second glass layer, and where the second via has the hourglass shaped cross-section. In an embodiment, the first via is electrically coupled to the second via.