A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.

An electronic device, comprising: a first functional board, a second functional board, and a connector main body, wherein the connector main body is a PCB, wherein a plurality of via holes are formed in the PCB, wherein soldering pads are arranged in the via holes, and wherein the soldering pads are used for communicating the first functional board and second functional board, wherein the PCB is provided with a space for accommodating elements on the first and second functional boards, wherein the soldering pads on both sides of the connector are respectively connected with the soldering pad of the first functional board and the soldering pad of the second functional board.

An electronic device, comprising: a first functional board, a second functional board, and a connector main body, wherein the connector main body is a PCB, wherein a plurality of via holes are formed in the PCB, wherein soldering pads are arranged in the via holes, and wherein the soldering pads are used for communicating the first functional board and second functional board, wherein the PCB is provided with a space for accommodating elements on the first and second functional boards, wherein the soldering pads on both sides of the connector are respectively connected with the soldering pad of the first functional board and the soldering pad of the second functional board.

Flexible electrical devices comprising electrode layers on softening polymers and methods of manufacturing such devices, including lift-off processes for forming electrodes on softening polymers, processes for forming devices with a patterned double softening polymer layer, and solder reflow processes for forming electrical contacts on softening polymers.

A circuit board may include a plurality of electrically-conductive layers separated and supported by layers of insulating material laminated together and a via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board, the via comprising a first via portion comprising electrically-conductive material and having a first diameter and a first depth from a surface of the circuit board and a second via portion comprising electrically-conductive material and having a second diameter smaller than the first diameter and a second depth from the first depth.

The invention concerns an electrical connection pad (10′) for providing an electrical connection between components of an electronic system, wherein the electrical connection pad comprises: a metallic layer (12); and a laser induced periodic surface structure (20), LIPSS, formed on an external surface (16) of the electrical connection pad (10) and exposing the metallic layer (12) and a method for correspondingly laser-treating an electrical connection pad (10).

In a method of manufacturing a printed wiring board with a pattern formed using a printing process, a pattern of a portion requiring position accuracy can be accurately formed at a predetermined position.

A method of manufacturing a printed wiring board 10 according to the present invention includes preparing a laminated board 12 including a metal layer 16 formed on a surface of a base material 14, forming a first etching resist layer 20a by printing a pattern of a portion 18a requiring position accuracy on the metal layer of the laminated board using a metal mask 32, forming a second etching resist layer 20b by printing a pattern of a portion 18b other than the portion requiring position accuracy on the metal layer of the laminated board using a screen plate 34, removing, by etching, the metal layer of the laminated board where the first etching resist layer and the second etching resist layer are not formed, and stripping the first etching resist layer and the second etching resist layer.

Electronic modules and methods of fabrication are described. In an embodiment, an electronic module includes a molded system-in-package, and a flexible circuit mounted on a side surface of a molding compound layer such that the flexible circuit is in electrical contact with a lateral interconnect exposed along the side surface of the molding compound layer.

A printed circuit board according to an embodiment includes an insulating layer; and a via portion disposed on the insulating layer; wherein the via portion includes: a first pad disposed under the insulating layer; a second pad disposed on the insulating layer; and a via part disposed between the first and second pads in the insulating layer; and wherein a width of the first pad is less than or equal to a width of a lower surface of the via part.

A component carrier includes a stack having at least one horizontal electrically conductive layer structure, at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and at least one vertical via being laterally offset from the semiconductor component. The at least one horizontal electrically conductive layer structure electrically connects the vertical via to a bottom main surface of the semiconductor component. The component carrier is configured for a current flow from the vertical via to the horizontal electrically conductive layer structure, from the horizontal electrically conductive layer structure to the bottom main surface of the semiconductor component, from the bottom main surface of the semiconductor component to an upper main surface of the semiconductor component, and from the upper surface of the semiconductor component to the outside of the component carrier.