Disclosed are systems and methods for facilitating the cooling of electronic devices. In one embodiment, a cooling system includes a core having a plurality of surface channels configured to facilitate the transport of a working fluid. The cooling system can include a cover configured to cover the surface channels, and further configured to couple to the core to form a leak proof seal with an interference fit. In some embodiments, the interference fit can be the result of a thermal fitting. The core can be a metal core printed circuit board. The core can be configured to be in thermal communication with a printed circuit board. In certain embodiments, the surface channels are in communication with a fluid inlet and a fluid outlet; the fluid inlet and the fluid outlet can be placed on a side of the core opposite a side of the core having the surface channels.

A manufacturing method of a circuit substrate comprises the steps of providing a laminated substrate comprising an insulating layer and a circuit layer disposed on the insulating layer; forming a photoresist layer on the circuit layer; mechanically cutting the photoresist layer and a part of the circuit layer to form gaps; etching the circuit layer in the gaps until a surface of the insulating layer is exposed to form a circuit layout; and removing the photoresist layer to form the circuit substrate.

A wiring circuit board includes a support metal layer having thermal conductivity of 5 W/m.Math.K or more, an insulating layer disposed on at least one side in a thickness direction of the support metal layer, a wiring layer disposed on a front surface of the insulating layer, a protective metal film disposed on the entire surface of the support metal layer between the support metal layer and the insulating layer, and a protective thin film disposed on an exposed surface exposed from the protective metal film in the support metal layer.

A wiring circuit board includes a support metal layer having thermal conductivity of 5 W/m.Math.K or more, an insulating layer disposed on at least one side in a thickness direction of the support metal layer, a wiring layer disposed on a front surface of the insulating layer, a protective metal film disposed on the entire surface of the support metal layer between the support metal layer and the insulating layer, and a protective thin film disposed on an exposed surface exposed from the protective metal film in the support metal layer.

In one or more embodiments, a method of manufacturing a high impedance surface (HIS) apparatus comprises patterning a first conducting layer on a core to form a first set of conducting pads, and patterning a second conducting layer on the core to form a second set of conducting pads. The method further comprises applying solder paste to each of the conducting pads of the second set of conducting pads. Also, the method comprises placing chip capacitors on the solder paste on the second set of conducting pads. In addition, the method comprises applying underfill between the chip capacitors. Also, the method comprises applying solder paste to each of the conducting pads of the first set of conducting pads. In addition, the method comprises placing chip inductors on the solder paste on the first set of conducting pads. Further, the method comprises applying underfill between the chip inductors.

In one or more embodiments, a method of manufacturing a high impedance surface (HIS) apparatus comprises patterning a first conducting layer on a core to form a first set of conducting pads, and patterning a second conducting layer on the core to form a second set of conducting pads. The method further comprises applying solder paste to each of the conducting pads of the second set of conducting pads. Also, the method comprises placing chip capacitors on the solder paste on the second set of conducting pads. In addition, the method comprises applying underfill between the chip capacitors. Also, the method comprises applying solder paste to each of the conducting pads of the first set of conducting pads. In addition, the method comprises placing chip inductors on the solder paste on the first set of conducting pads. Further, the method comprises applying underfill between the chip inductors.

The invention is related to an electronic assembly comprising a printed circuit board and an electronic component. The printed circuit board comprises a first side and a second side opposite to the first side. The electronic component is installed in the first side of the printed circuit board. The printed circuit board is an insulated metal substrate printed circuit board and comprises a bending portion which divides the printed circuit board into a first main portion and a second main portion, the electronic component being located in the first main portion. The first and second main portions are not comprised in a common plane.

A wiring circuit board includes a metal supporting board; an insulating layer; and a conductive layer in this order in a thickness direction. The conductive layer includes a terminal portion, and a tail line portion extending from the terminal portion. The terminal portion has a via portion that penetrates the insulating layer in the thickness direction and is connected to the metal supporting board. The tail line portion has a base end portion that has a width different from a width of the terminal portion in a direction orthogonal to the extending direction of the tail line portion and that is connected with the terminal portion; and a second via portion that penetrates the insulating layer in the thickness direction and that is connected to the metal supporting board.

A wiring circuit board includes a metal supporting board; an insulating layer; and a conductive layer in this order in a thickness direction. The conductive layer includes a terminal portion, and a tail line portion extending from the terminal portion. The terminal portion has a via portion that penetrates the insulating layer in the thickness direction and is connected to the metal supporting board. The tail line portion has a base end portion that has a width different from a width of the terminal portion in a direction orthogonal to the extending direction of the tail line portion and that is connected with the terminal portion; and a second via portion that penetrates the insulating layer in the thickness direction and that is connected to the metal supporting board.

A light emitting diode (LED) module may include a direct current (DC) voltage node formed on a first layer. The DC voltage node may be configured to sink a first current. One or more devices may be formed on the first layer configured to provide a second current to one or more LEDs. A device of the one or more devices may carry a steep slope voltage waveform. A local shielding area may be formed in a second layer directly below the DC voltage node and the one or more devices. The local shielding area may include a substantially continuous area of conductive material. A conductive via may extend through one or more layers. The conductive via may electrically connect the DC voltage node and the local shielding area.