A coil-embedded ceramic substrate includes a plurality of ceramic layers including multi-turn coil patterns provided thereon. At least one ceramic layer of the plurality of ceramic layers includes thereon a multi-turn coil pattern and dummy patterns not electrically connected to the multi-turn coil pattern. The multi-turn coil pattern winds around and extends parallel or substantially parallel to sides of the ceramic layer. The dummy patterns are each parallel or substantially parallel to corresponding ones of the sides of the ceramic layer as an extension of portion of the coil pattern in an extending direction.

A composite substrate that includes: an upper ceramic layer; a lower ceramic layer; a middle resin layer between the upper ceramic layer and the lower ceramic layer; and a side surface resin layer on all side surfaces of the composite substrate, wherein the middle resin layer and the side surface resin layer are integral resin layers.

A multilayer substrate includes a base body including a first main surface, a first external electrode provided on the first main surface and made of metal foil, a first interlayer connection conductor, and a second interlayer connection conductor having higher conductivity than the first interlayer connection conductor. The base body includes insulating base material layers that are stacked on one another. The first interlayer connection conductor is provided at least in an insulating base material layer on which the first external electrode is provided, and is connected to the first external electrode. The second interlayer connection conductor is disposed inside the base body, and is connected to the first external electrode through the first interlayer connection conductor.

A component carrier for carrying at least one electronic component includes (a) a plurality of electrically conductive layers; (b) a plurality of electrically insulating layers; and (c) a thermoplastic structure. The electrically conductive layers, the electrically insulating layers, and the thermoplastic structure form a laminate. Further, a method for manufacturing such a component carrier and an electronic apparatus including such a component carrier are provided.

An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.

A circuit board includes a circuit substrate, a solder, and a surrounding portion. The circuit substrate includes a connecting pad. The solder is formed on a surface of the connecting pad. The surrounding portion is formed on the surface of the connecting pad and cooperates with the connecting pad to form a groove receiving the solder. The surrounding portion surrounds the solder and is spaced from the solder. A method for manufacturing a circuit board is also provided.

An electronic component includes a body having a side surface, coil conductor layers wound along main surfaces parallel to the side surface, and capacitor conductor layers each having a substantially plate-like shape parallel to the side surface. The coil conductor layers and the capacitor conductor layers are arranged in a widthwise direction perpendicular to the side surface. The capacitor conductor layers include first and second capacitor conductor layers adjacent to each other in the widthwise direction. The coil conductor layers include a first coil conductor layer that is in the same layer as the first capacitor conductor layer and a second coil conductor layer that is in the same layer as the second capacitor conductor layer. The shortest distance between the first coil conductor layer and the first capacitor conductor layer is larger than the shortest distance between the second coil conductor layer and the second capacitor conductor layer.

A low temperature co-fired ceramic (LTCC) electronic device includes a template layer, a base layer and a conductor. The template layer and the base layer are ceramic layers. The template layer has an electrode pattern formed by a hollow groove. A depth of the hollow groove is between 10 μm and 120 μm, and a width of the hollow groove is above 80 μm. The base layer is closely overlapped with the template layer. An overlapping area range of the base layer and the template layer at least covers the electrode pattern. The conductor is filled in the hollow groove of the electrode pattern. A filling thickness of the conductor is above 10 μm.

A semi-flexible component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure. The layer structures are stacked on top of each other in a stacking direction s. A recess extends from a first main surface of the stack into the stack and extends only partially into one of the at least one electrically insulating layer structure so that an electrically insulating layer structure having a stepped portion is formed. The stepped portion provides a flexible region of the stack with respect to a rigid region of the stack.

A printed wiring board includes a resin insulating layer, pads formed on the resin insulating layer, an uppermost resin insulating layer formed on the resin insulating layer such that the uppermost resin insulating layer is covering the pads and has openings exposing the pads, respectively, via conductors formed in the uppermost resin insulating layer such that the via conductors are formed on the pads exposed from the openings in the uppermost resin insulating layer, respectively, and metal posts formed on the via conductors such that each of the metal posts has a portion on a surface of the uppermost resin insulating layer around the via conductors and a side surface having a flared bottom extending toward the uppermost resin insulating layer.