On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Embodiments include smart jumper cables for jump-starting a vehicle. A jumper cable is configured with an electronic control module that monitors the connection at each end of the jumper cable, and only closes the circuit when a battery or vehicle electrical system is detected as properly connected to each end. In some embodiments, the electronic control module opens the circuit when a successful jump-start is detected. In some embodiments, the electronic control module further monitors the temperature of the jumper cable, and modulates the power transfer or opens the circuit if the temperature exceeds a predetermined level.

A modular planar electrical wiring system for providing a planar electrical wiring according to a desired configuration includes a planar electrical distribution cable, at least one planar electrical appliance embedded in a planar sheet and connectable to the planar electrical distribution cable; and at least one planar connector for connecting a corresponding planar electrical appliance to the electrical distribution cable at any given location therealong according to the desired configuration, to thereby provide a modular planar electrical wiring system having a low height profile. There is also provided a modular power distribution system provided with a power source, an enclosure for a planar power distribution cable, a crimp connector including a control system, and power sources for a planar modular power distribution system.

An automobile architecture makes it possible to achieve reduction of a cable diameter. The architecture includes a composite cable, a main electronic control unit, a subsidiary electronic control unit, a motor sensor, and a wheel velocity sensor. In the architecture, the composite cable connects the main electronic control unit and the subsidiary electronic control unit, and the motor sensor and the wheel velocity sensor are connected to the subsidiary electronic control unit.

A power converter arrangement including a semiconductor switch system including at least one controllable switch, a capacitor unit including at least one capacitor having a capacitance value, the capacitor unit being operatively connected to the semiconductor switch system, a conductor arrangement including of at least one conductor adapted to conduct an electric current between the capacitor unit and the semiconductor switch system, wherein the at least one conductor having a resistance and an inductance, and wherein a resonant circuit is formed by the resistance, the inductance and the capacitance, and wherein the power converter arrangement includes at least one attenuating element for attenuating an electrical ringing in the resonant circuit, wherein the at least one attenuating element is conductively isolated from the resonant circuit, and wherein the at least one attenuating element includes ferromagnetic material, and wherein the at least one attenuating element is magnetically coupled to the at least one conductor such that variations in the electric current intensity of the at least one conductor induces eddy currents within the at least one attenuating element.

On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Substrate-free mechanical structural systems comprised of interconnected subsystems of electronic and/or electromechanical components.

The present invention discloses a modularized circuit for isolated circuit, wherein the isolated circuit includes at least two circuit components connecting in parallel and/or series, the circuit components, according to a circuit connection configuration, weld corresponding pins of the components directly, forming an integrated module in accordance with a desired connection method of the circuit, and saving circuit boards and wires; the circuit components are designed as a parallelepiped, and a plurality of bonding pads are arranged on part of an area on a surface of the parallelepiped. Due to constructing a circuit unit by welding connections in a way of building blocks, welding directly between components in a 3D space, comparing to the circuits limited in a circuit board plane as a PCB, it owns a wider design space.

The present invention discloses a modularized circuit for isolated circuit, wherein the isolated circuit includes at least two circuit components connecting in parallel and/or series, the circuit components, according to a circuit connection configuration, weld corresponding pins of the components directly, forming an integrated module in accordance with a desired connection method of the circuit, and saving circuit boards and wires; the circuit components are designed as a parallelepiped, and a plurality of bonding pads are arranged on part of an area on a surface of the parallelepiped. Due to constructing a circuit unit by welding connections in a way of building blocks, welding directly between components in a 3D space, comparing to the circuits limited in a circuit board plane as a PCB, it owns a wider design space.

On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.