Patent classifications
H10B41/70
Semiconductor device and method for manufacturing semiconductor device
A highly reliable semiconductor device is provided. The semiconductor device includes a first insulator; a first oxide provided over the first insulator; a second oxide provided over the first oxide; a first conductor and a second conductor provided apart from each other over the second oxide; a third oxide provided over the second oxide, the first conductor, and the second conductor; a second insulating film provided over the third oxide; and a third conductor provided over the second oxide with the third oxide and the second insulating film positioned therebetween. The third oxide contains a metal element and nitrogen, and the metal element is bonded to nitrogen.
Semiconductor device and memory device
A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a second insulator in contact with the first insulator. The first insulator includes excess oxygen. The second insulator has a function of trapping or fixing hydrogen. Hydrogen in the oxide semiconductor is bonded to the excess oxygen. The hydrogen bonded to the excess oxygen passes through the first insulator and is trapped or fixed in the second insulator. The excess oxygen bonded to the hydrogen remains in the first insulator as the excess oxygen.
SEMICONDUCTOR DEVICE
[Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.
[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j-lth sub memory cell.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first oxide; a first conductor and a second conductor over the first oxide; a first insulator over the first conductor; a second insulator over the second conductor; a third insulator over the first insulator and the second insulator; a second oxide positioned over the first oxide and between the first conductor and the second conductor; a fourth insulator over the second oxide; a third conductor over the fourth insulator; a fifth insulator in contact with a top surface of the third insulator, a top surface of the second oxide, a top surface of the fourth insulator, and a top surface of the third conductor; a fourth conductor embedded in an opening formed in the first insulator, the third insulator, and the fifth insulator and in contact with the first conductor; and a fifth conductor embedded in an opening formed in the second insulator, the third insulator, and the fifth insulator and in contact with the second conductor. The third insulator includes, in the vicinity of an interface with the fourth conductor and in the vicinity of an interface with the fifth conductor, a region having a higher nitrogen concentration than a different region of the third insulator.
MANUFACTURING METHOD OF METAL OXIDE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device with high reliability is provided. A first step of forming a metal oxide containing indium over a substrate and a second step of performing microwave treatment from above the metal oxide are included. The first step is performed by a sputtering method using an oxide target containing indium. The second step is performed using a gas containing oxygen under reduced pressure, and by the second step, a defect in which hydrogen has entered an oxygen vacancy (VoH) in the metal oxide is divided into an oxygen vacancy (Vo) and hydrogen (H).
Semiconductor device and method for manufacturing semiconductor device
A highly reliable semiconductor device having a high on-state current is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a first conductor and a second conductor over the second oxide, a third insulator over the first conductor, a fourth insulator over the second conductor, a third oxide over the second oxide, a fifth insulator over the third oxide, a third conductor that is positioned over the fifth insulator and overlaps with the third oxide, a sixth insulator covering the first to fifth insulators, the first oxide, the second oxide, and the first to third conductors, and a seventh insulator over the sixth insulator.
SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
A novel semiconductor device formed with single-polarity circuits using OS transistors is provided. Thus, connection between different layers in a memory circuit is unnecessary. This can reduce the number of connection portions and improve the flexibility of circuit layout and the reliability of the OS transistors. In particular, many memory cells are provided; thus, the memory cells are formed with single-polarity circuits, whereby the number of connection portions can be significantly reduced. Further, by providing a driver circuit in the same layer as the cell array, many wirings for connecting the driver circuit and the cell array can be prevented from being provided between layers, and the number of connection portions can be further reduced. An interposer provided with a plurality of integrated circuits can function as one electronic component.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device that can be highly integrated is provided.
The semiconductor device includes first and second transistors and first and second capacitors. Each of the first and second transistors includes a gate insulator and a gate electrode over an oxide. Each of the first and second capacitors includes a conductor, a dielectric over the conductor, and the oxide. The first and second transistors are provided between the first capacitor and the second capacitor. One of a source and a drain of the first transistor is also used as one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is also used as one electrode of the first capacitor. The other of the source and the drain of the second transistor is also used as one electrode of the second capacitor. The channel lengths of the first and second transistors are larger than the lengths in a direction parallel to short sides of fourth and fifth conductors.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device with high reliability is provided by the following steps: forming an oxide semiconductor; forming a first insulator in contact with the oxide semiconductor; forming a second insulator over the first insulator, forming a third insulator over the second insulator; forming an opening in the third insulator, the second insulator, and the first insulator, cleaning the inside of the opening; embedding a conductor in the cleaned opening; forming the first insulator to include an excess-oxygen region; forming the second insulator to have a higher barrier property against oxygen, hydrogen, or water than the first insulator, and processing the opening to have a cylindrical shape or an inverted cone shape.
Semiconductor Storage Device And Electronic Apparatus
In a semiconductor storage device including a plurality of memory cells formed at a laminated substrate including a support layer, an insulating layer on the support layer, and a semiconductor layer on the insulating layer, the plurality of memory cells each include a floating gate transistor and a selection transistor. The floating gate transistor includes a first source region, a first drain region, a first body region, a first body contact region, a floating gate insulating film, and a floating gate electrode, and the selection transistor includes a second source region, a second drain region, a second body region, a second body contact region insulated from the first body contact region, a selection gate insulating film, and a selection gate electrode.