Disclosed are a memristor device, a method of fabricating the same, a synaptic device including a memristor device, and a neuromorphic device including a synaptic device. The disclosed memristor device may comprise a first electrode, a second electrode disposed to be spaced apart from the first electrode; and a resistance changing layer including a copolymer between the first electrode and the second electrode. The copolymer may be a copolymer of a first monomer and a second monomer, and the first polymer formed from the first monomer may have a property that diffusion of metal ions is faster than that of the second polymer formed from the second monomer. The second polymer may have a lower diffusivity of metal ions as compared with the first polymer. The first monomer may include vinylimidazole (VI). The second monomer may include 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane (V3D3). The copolymer may include p(V3D3-co-VI).

Disclosed are a memristor device, a method of fabricating the same, a synaptic device including a memristor device, and a neuromorphic device including a synaptic device. The disclosed memristor device may comprise a first electrode, a second electrode disposed to be spaced apart from the first electrode; and a resistance changing layer including a copolymer between the first electrode and the second electrode. The copolymer may be a copolymer of a first monomer and a second monomer, and the first polymer formed from the first monomer may have a property that diffusion of metal ions is faster than that of the second polymer formed from the second monomer. The second polymer may have a lower diffusivity of metal ions as compared with the first polymer. The first monomer may include vinylimidazole (VI). The second monomer may include 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane (V3D3). The copolymer may include p(V3D3-co-VI).

An electronic switching element is described having, in sequence, a first electrode, a molecular layer bonded to a substrate, and a second electrode. The molecular layer contains compounds of formula I, R.sup.1-(A.sup.1-Z.sup.1).sub.rB.sup.1(Z.sup.2-A.sup.2).sub.s-Sp-G, wherein A.sup.1, A.sup.2, B.sup.1, Z.sup.1, Z.sup.2, Sp, G, r, and s are as defined herein, in which a mesogenic radical is bonded to the substrate via a spacer group, Sp, by means of an anchor group, G. The switching element is suitable for production of components that can operate as a memristive device for digital information storage.

A circuit is disclosed that includes a first electrode, a second electrode and a plurality of quantum dot devices disposed between the first electrode and the second electrode. An impedance is coupled to the second electrode and has a value selected to conduct or block conduction of current when a coherent electron conduction band is formed by one or more of the quantum dot devices, such as with quantum dot devices in an adjacent circuit.

Programmable memory devices having a cross-point array of polymer junctions with individually-programmed conductances are provided. In one aspect, a method of forming a memory device includes: forming first metal lines on an insulating substrate; forming polymeric resistance elements on the first metal lines; and forming second metal lines over the polymeric resistance elements with a single one of the polymeric resistance elements present at each intersection of the first/second metal lines forming a cross-point array. A memory device and a method of operating a memory device are also provided.

A memory cell includes a first conductive line, a lower electrode, a carbon nano-tube (CNT) layer, a middle electrode, a resistive layer, a top electrode and a second conductive line. The first conductive line is disposed over a substrate. The lower electrode is disposed over the first conductive line. The carbon nano-tube (CNT) layer is disposed over the lower electrode. The middle electrode is disposed over the carbon nano-tube layer, thereby the lower electrode, the carbon nano-tube (CNT) layer and the middle electrode constituting a nanotube memory part . The resistive layer is disposed over the middle electrode. The top electrode is disposed over the resistive layer, thereby the middle electrode, the resistive layer and the top electrode constituting a resistive memory part. The second conductive line is disposed over the top electrode.

The present disclosure generally relates to combinations of resistive change elements and resistive change element arrays thereof. The present disclosure also generally relates to combinational resistive change elements and combinational resistive change element arrays thereof. The present disclosure additionally generally relates to devices and methods for programming and accessing combinations of resistive change elements. The present disclosure further generally relates to devices and methods for programming and accessing combinational resistive change elements.

Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.

A method for producing a memory cell includes providing a non-conductive substrate, mounting a first conductor track made of conductive material on the non-conductive substrate, mounting a porous dielectric with or without redox-active molecules in a form of points on the first conductor track, and mounting a second conductor track orthogonally to the first conductor track, wherein the first and second conductor tracks have an electrode function at their intersection point, and wherein the porous dielectric is arranged between the electrodes. The method further includes mounting a passivation layer on the substrate, the first conductor track, the dielectric, and the second conductor track, so that the conductor track remains contactable. The first and the second conductor track form a memory at their intersection point with the dielectric arranged between them, in which the redox reaction of the redox-active molecules is configured to be driven by a voltage.

Memory devices are provided having a cross-point array of polymer junctions with individually-programmed conductances that can be reset. In one aspect, a memory device is provided. The memory device includes: bottom metal lines; top metal lines; and polymer junctions in between the bottom metal lines and the top metal lines, wherein the polymer junctions include an organic polymer doped with a spiropyran and an acid. A method of forming and a method of operating the memory device are also provided.