A thin-film transistor array includes a substrate and thin-film transistors positioned in matrix on the substrate. The thin-film transistors each include source and drain electrodes formed on a gate insulation layer, and a semiconductor layer formed on the gate insulation layer and positioned between the source and drain electrodes. The semiconductor layer is formed in stripes over the plurality of thin-film transistors such that one of the stripes has a long axis direction coinciding with a channel width direction of one of the thin-film transistors. The semiconductor layer has a cross section in a short axis direction of the stripe such that a thickness of the semiconductor layer gradually decreases outwardly from a center portion of the stripe.

A flexible array substrate structure and manufacturing method thereof are disclosed, in which the patterning process of an organic semi-conductive layer is achieved by using the inside wall of the opening of a color film layer as a bank, so that one mask can be saved. Also, a process for manufacturing a device can be simplified by an improved device structure, so that the flexible array substrate structure of the invention can be obtained by only using four masks.

A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.

The present disclosure relates to a semiconductor device comprising a first electrode, a second electrode, a third electrode, a fourth electrode, an insulating layer, and a nano-heterostructure. The nano-heterostructure comprises a first surface and a second surface. The first metallic carbon nanotube is located on the first surface and extends in a first direction. The semiconducting carbon nanotube is located on the first surface and extends in the first direction. The semiconducting carbon nanotube is parallel and spaced away from the first metallic carbon nanotube. The second metallic carbon nanotube is located on the second surface and extends in a second direction. An angle forms between the first direction and the second direction.

Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.

A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Embodiments relate to the authentication of a semiconductor. An identification circuit disposed within a package of an integrated circuit, and the identification circuit includes carbon-nanotube transistors configured to generate an encryption key.

A system for sensing data includes one or more sensors formed on a substrate, including flexible substrates. A plurality of transistors are coupled to the one or more sensors and formed on the substrate. Each transistor of the plurality of transistors is constructed with a channel formed of a nanoscale material. The plurality of transistors are configured to perform computing tasks such that data processing and classification are performed directly on the sensor substrate. The nanoscale material can include carbon nanotubes.

An organic semiconductor substrate includes a base, a first conductive pattern, a second conductive pattern, a first metal oxide pattern, a second metal oxide pattern, an organic flat pattern layer, a source, a drain, an organic semiconductor pattern, an organic gate insulating layer, and a gate. The first conductive pattern and the second conductive pattern are disposed on the base and separated from each other. The first metal oxide pattern and the second metal oxide pattern respectively cover and are electrically connected to the first conductive pattern and the second conductive pattern, respectively. A first portion of the organic flat pattern layer is disposed between the first metal oxide pattern and the second metal oxide pattern. A surface of the first metal oxide pattern has a first distance from the base. A surface of the first portion of the organic flat pattern layer has a second distance from the base. The second distance is less than or equal to the first distance.