When a conductive layer occupying a large area is provided in a coiled antenna portion, it has been difficult to supply power stably. A memory circuit portion and a coiled antenna portion are disposed by being stacked together; therefore, it is possible to prevent a current from flowing through a conductive layer occupying a large area included in the memory circuit portion, and thus, power saving can be achieved. In addition, the memory circuit portion and the coiled antenna portion are disposed by being stacked together, and thus, it is possible to use a space efficiently. Therefore, downsizing can be realized.

The present invention relates to a compounds of formula I

R.sup.1-(A.sup.1-Z.sup.1).sub.r—B.sup.1—Z.sup.L-A.sup.2-(Z.sup.3-A.sup.3).sub.s-G   (I)

in which the occurring groups and parameters have the meanings given in claim 1, to the use thereof for the formation of molecular layers, in particular self assembled monolayers, to a process for the fabrication of a switching element for memristive devices comprising said molecular layers and to a memristic device comprising said switching element.

Integrated circuits are described that utilize internal state machine-driven logic elements (e.g., flops) within input and/or output wrapper chains that are used to test internal core logic of the integrate circuit. One or more individual logic elements of the wrapper chains within the integrated circuit is implemented as a multi-flop state machine rather than a single digital flip-flop. As multi-flop state machines, each enhanced logic element of a wrapper chain is individually configurable to output pre-selected values so as to disassociate the state machine-driven flops from signal transmission delays that may occur in the input or output wrapper chains of the integrated circuit.

The present invention relates to diamondoid compounds of formula I

D.sup.1-Z.sup.D-(A.sup.1-Z.sup.1).sub.r-B.sup.1-(Z.sup.2-A.sup.2).sub.s-Sp-G   (I)

in which the occurring groups and parameters have the meanings given in claim 1, to the use thereof for the formation of molecular layers, in particular self assembled monolayers (SAM), to a process for the fabrication of a switching element for memristive devices comprising said molecular layers and to a memristic device comprising said switching element.

A cross-bar ReRAM comprising a substrate, a plurality of first columns extending parallel to each other on the top surface of the substrate, wherein each of the plurality of the first columns includes a resistive random-access memory (ReRAM) stack comprised of a plurality of layers. A plurality of second columns extending parallel to each other and the plurality of second columns extending perpendicular to the plurality of first columns, wherein the plurality of second columns is located on top of the plurality of first columns, such that the plurality of second columns crosses over the plurality of first columns. A dielectric layer filling in the space between the plurality of first columns and the plurality of second columns, wherein the dielectric layer is in direct contact with a sidewall of each of the plurality layers of the ReRAM stack.

Integrated circuits are described that utilize internal state machine-driven logic elements (e.g., flops) within input and/or output wrapper chains that are used to test internal core logic of the integrate circuit. One or more individual logic elements of the wrapper chains within the integrated circuit is implemented as a multi-flop state machine rather than a single digital flip-flop. As multi-flop state machines, each enhanced logic element of a wrapper chain is individually configurable to output pre-selected values so as to disassociate the state machine-driven flops from signal transmission delays that may occur in the input or output wrapper chains of the integrated circuit.

A cross-bar ReRAM comprising a substrate, a plurality of first columns extending parallel to each other on the top surface of the substrate, wherein each of the plurality of the first columns includes a resistive random-access memory (ReRAM) stack comprised of a plurality of layers. A plurality of second columns extending parallel to each other and the plurality of second columns extending perpendicular to the plurality of first columns, wherein the plurality of second columns is located on top of the plurality of first columns, such that the plurality of second columns crosses over the plurality of first columns. A dielectric layer filling in the space between the plurality of first columns and the plurality of second columns, wherein the dielectric layer is in direct contact with a sidewall of each of the plurality layers of the ReRAM stack.

Devices comprising a resistance-switching polymer film are described. Also described are methods of making the devices comprising the resistance-switching polymer film.

An electronic switching device, in particular tunnel junctions, containing an organic molecular layer for use in memory, sensors, field-effect transistors or Josephson junctions. More particularly, related to the field of random access non-volatile memristive memories (RRAM). Another aspect is a compound of formula I

##STR00001##

for use in a molecular layer. Also, the use of the molecular layer and processes for the production and operation of an electronic switching element and components based thereon.

Programmable memory devices having a cross-point array of polymer junctions with individually-programmed conductances are provided. In one aspect, a method of forming a memory device includes: forming first metal lines on an insulating substrate; forming polymeric resistance elements on the first metal lines; and forming second metal lines over the polymeric resistance elements with a single one of the polymeric resistance elements present at each intersection of the first/second metal lines forming a cross-point array. A memory device and a method of operating a memory device are also provided.